| /drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| A D | display_mode_vba_util_32.h | 127 unsigned int HActive[],
173 unsigned int HActive[],
218 unsigned int HActive,
258 unsigned int HActive,
294 unsigned int HActive,
316 unsigned int HActive,
324 unsigned int HActive,
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| A D | display_mode_vba_util_32.c | 438 unsigned int HActive[], in dml32_CalculateSwathAndDETConfiguration()
501 HActive, in dml32_CalculateSwathAndDETConfiguration()
705 unsigned int HActive[], in dml32_CalculateSwathWidth()
754 dml_round(HActive[k] / 4.0 * HRatio[k])); in dml32_CalculateSwathWidth()
1183 unsigned int HActive, in dml32_CalculateODMMode() argument
1277 HActive > DCN32_MAX_FMT_420_BUFFER_WIDTH) { in dml32_CalculateODMMode()
1345 unsigned int HActive, in dml32_CalculateOutputLink() argument
1577 unsigned int HActive, in dml32_TruncToValidBPP() argument
1694 unsigned int HActive, in dml32_RequiredDTBCLK() argument
1721 unsigned int HActive, in dml32_DSCDelayRequirement() argument
[all …]
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| A D | display_mode_vba_32.c | 191 mode_lib->vba.HActive, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
271 mode_lib->vba.HActive, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
367 mode_lib->vba.HActive[k], mode_lib->vba.HTotal[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1999 mode_lib->vba.HActive, in dml32_ModeSupportAndSystemConfigurationFull()
2043 mode_lib->vba.HActive[k], in dml32_ModeSupportAndSystemConfigurationFull()
2066 mode_lib->vba.HActive[k], in dml32_ModeSupportAndSystemConfigurationFull()
2096 mode_lib->vba.HActive[k], in dml32_ModeSupportAndSystemConfigurationFull()
2493 if (mode_lib->vba.HActive[k] in dml32_ModeSupportAndSystemConfigurationFull()
2500 if (mode_lib->vba.HActive[k] in dml32_ModeSupportAndSystemConfigurationFull()
2599 mode_lib->vba.HActive, in dml32_ModeSupportAndSystemConfigurationFull()
[all …]
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| /drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| A D | display_mode_vba_314.c | 566 int HActive[],
599 int HActive[],
2201 v->HActive,
3347 v->HActive,
3691 int HActive, argument
4134 v->HActive,
4385 v->HActive[k],
4758 v->HActive,
6731 int HActive[],
6779 HActive,
[all …]
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| /drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| A D | display_mode_vba_31.c | 558 int HActive[],
591 int HActive[],
2183 v->HActive,
3329 v->HActive,
3585 int HActive, argument
4044 v->HActive,
4298 v->HActive[k],
4672 v->HActive,
6637 int HActive[],
6685 HActive,
[all …]
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| /drivers/gpu/drm/amd/display/dc/dml2/ |
| A D | display_mode_core.c | 83 dml_uint_t HActive,
106 dml_uint_t HActive,
378 dml_uint_t HActive,
449 dml_uint_t HActive,
604 dml_uint_t HActive[],
739 dml_uint_t HActive,
2710 dml_uint_t HActive, in TruncToValidBPP() argument
4135 p->HActive, in CalculateSwathAndDETConfiguration()
4582 dml_uint_t HActive, in RequiredDTBCLK() argument
6380 myPipe->HActive = mode_lib->ms.cache_display_cfg.timing.HActive[k]; in dml_prefetch_check()
[all …]
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| A D | dml2_utils.c | 43 dml_timing_array->HActive[dst_index] = dml_timing_array->HActive[src_index]; in dml2_util_copy_dml_timing()
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| A D | display_mode_core_structs.h | 469 dml_uint_t HActive; member
611 dml_uint_t HActive[__DML_NUM_PLANES__]; member
1502 dml_uint_t *HActive; member
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| A D | dml_display_rq_dlg_calc.c | 212 dml_uint_t hactive = timing->HActive[plane_idx]; in dml_rq_dlg_get_dlg_reg()
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| A D | display_mode_util.c | 532 dml_print("DML: timing_cfg: plane=%d, HActive = %d\n", i, timing->HActive[i]); in dml_print_dml_display_cfg_timing()
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| A D | dml2_translation_helper.c | 756 …out->HActive[location] = in->timing.h_addressable + in->timing.h_border_left + in->timing.h_border… in populate_dml_timing_cfg_from_stream_state()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| A D | display_mode_vba_30.c | 573 int HActive[],
2053 v->HActive, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3441 long HActive, in TruncToValidBPP() argument
3832 v->HActive, in dml30_ModeSupportAndSystemConfigurationFull()
4054 v->HActive[k], in dml30_ModeSupportAndSystemConfigurationFull()
4086 v->HActive[k], in dml30_ModeSupportAndSystemConfigurationFull()
4106 v->HActive[k], in dml30_ModeSupportAndSystemConfigurationFull()
4126 v->HActive[k], in dml30_ModeSupportAndSystemConfigurationFull()
4297 v->HActive, in dml30_ModeSupportAndSystemConfigurationFull()
6112 int HActive[], in CalculateSwathAndDETConfiguration()
[all …]
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| /drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/ |
| A D | dml2_core_dcn4_calcs.c | 1260 unsigned int HActive, in TruncToValidBPP() argument
4036 unsigned int HActive, in ValidateODMMode() argument
4063 if (HActive % h_timing_div_mode) in ValidateODMMode()
4072 if (HActive > MaxHActiveForDSC) in ValidateODMMode()
4076 if (HActive % NumberOfDSCSlices) in ValidateODMMode()
4087 if (HActive > MaxHActiveFor420) in ValidateODMMode()
4096 unsigned int HActive, in CalculateODMMode() argument
4167 HActive, in CalculateODMMode()
4200 unsigned int HActive, in CalculateOutputLink() argument
4459 unsigned int HActive, in RequiredDTBCLK() argument
[all …]
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| A D | dml2_core_shared_types.h | 122 unsigned int HActive; member
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| /drivers/gpu/drm/amd/display/dc/dml/ |
| A D | display_mode_structs.h | 116 unsigned int HActive; member
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| A D | display_mode_vba.h | 496 unsigned int HActive[DC__NUM_DPP__MAX]; member
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| A D | display_mode_vba.c | 617 mode_lib->vba.HActive[mode_lib->vba.NumberOfActivePlanes] = dst->hactive; in fetch_pipe_params()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| A D | display_mode_vba_20v2.c | 1407 mode_lib->vba.HActive[k] / 2.0 in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1848 (double) mode_lib->vba.HActive[k] in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1862 (double) mode_lib->vba.HActive[k] in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2935 mode_lib->vba.HActive[k] / 2.0 * mode_lib->vba.HRatio[k]); in dml20v2_DisplayPipeConfiguration()
4014 } else if (locals->DSCEnabled[k] && (locals->HActive[k] > DCN20_MAX_DSC_IMAGE_WIDTH)) { in dml20v2_ModeSupportAndSystemConfigurationFull()
4017 … } else if (locals->HActive[k] > DCN20_MAX_420_IMAGE_WIDTH && locals->OutputFormat[k] == dm_420) { in dml20v2_ModeSupportAndSystemConfigurationFull()
4117 …if (dml_min(locals->SwathWidthYSingleDPP[k], dml_round(mode_lib->vba.HActive[k] / 2.0 * mode_lib->… in dml20v2_ModeSupportAndSystemConfigurationFull()
4384 mode_lib->vba.HActive[k] in dml20v2_ModeSupportAndSystemConfigurationFull()
4396 dml_ceil(mode_lib->vba.HActive[k] / mode_lib->vba.slices, 1.0), in dml20v2_ModeSupportAndSystemConfigurationFull()
4422 …te[i][j][k] = dml_min(locals->SwathWidthYSingleDPP[k], dml_round(locals->HActive[k] / 2 * locals->… in dml20v2_ModeSupportAndSystemConfigurationFull()
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| A D | display_mode_vba_20.c | 1347 mode_lib->vba.HActive[k] / 2.0 in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1812 (double) mode_lib->vba.HActive[k] in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1826 (double) mode_lib->vba.HActive[k] in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2862 mode_lib->vba.HActive[k] / 2.0 * mode_lib->vba.HRatio[k]); in dml20_DisplayPipeConfiguration()
3903 … } else if (locals->HActive[k] > DCN20_MAX_420_IMAGE_WIDTH && locals->OutputFormat[k] == dm_420) { in dml20_ModeSupportAndSystemConfigurationFull()
4003 …if (dml_min(locals->SwathWidthYSingleDPP[k], dml_round(mode_lib->vba.HActive[k] / 2.0 * mode_lib->… in dml20_ModeSupportAndSystemConfigurationFull()
4263 mode_lib->vba.HActive[k] in dml20_ModeSupportAndSystemConfigurationFull()
4275 dml_ceil(mode_lib->vba.HActive[k] / mode_lib->vba.slices, 1.0), in dml20_ModeSupportAndSystemConfigurationFull()
4301 …te[i][j][k] = dml_min(locals->SwathWidthYSingleDPP[k], dml_round(locals->HActive[k] / 2 * locals->… in dml20_ModeSupportAndSystemConfigurationFull()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| A D | display_mode_vba_21.c | 1700 mode_lib->vba.HActive[k] / 2.0 in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1804 (double) mode_lib->vba.HActive[k] in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1818 (double) mode_lib->vba.HActive[k] in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2960 mode_lib->vba.HActive[k] / 2.0 * mode_lib->vba.HRatio[k]); in DisplayPipeConfiguration()
4108 } else if (locals->DSCEnabled[k] && (locals->HActive[k] > DCN21_MAX_DSC_IMAGE_WIDTH)) { in dml21_ModeSupportAndSystemConfigurationFull()
4111 … } else if (locals->HActive[k] > DCN21_MAX_420_IMAGE_WIDTH && locals->OutputFormat[k] == dm_420) { in dml21_ModeSupportAndSystemConfigurationFull()
4211 …if (dml_min(locals->SwathWidthYSingleDPP[k], dml_round(mode_lib->vba.HActive[k] / 2.0 * mode_lib->… in dml21_ModeSupportAndSystemConfigurationFull()
4478 mode_lib->vba.HActive[k] in dml21_ModeSupportAndSystemConfigurationFull()
4490 dml_ceil(mode_lib->vba.HActive[k] / mode_lib->vba.slices, 1.0), in dml21_ModeSupportAndSystemConfigurationFull()
4538 …dml_min(locals->SwathWidthYSingleDPP[k], dml_round(mode_lib->vba.HActive[k] / 2.0 * mode_lib->vba.… in dml21_ModeSupportAndSystemConfigurationFull()
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