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Searched refs:HDMI_AUDIO_PACKET_CONTROL (Results 1 – 17 of 17) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dce/
A Ddce_stream_encoder.h75 SRI(HDMI_AUDIO_PACKET_CONTROL, DIG, id),\
174 SE_SF(HDMI_AUDIO_PACKET_CONTROL, HDMI_AUDIO_PACKETS_PER_LINE, mask_sh),\
175 SE_SF(HDMI_AUDIO_PACKET_CONTROL, HDMI_AUDIO_DELAY_EN, mask_sh),\
676 uint32_t HDMI_AUDIO_PACKET_CONTROL; member
A Ddce_stream_encoder.c1269 REG_UPDATE_2(HDMI_AUDIO_PACKET_CONTROL, in dce110_se_setup_hdmi_audio()
/drivers/gpu/drm/amd/display/dc/dio/dcn10/
A Ddcn10_stream_encoder.h66 SRI(HDMI_AUDIO_PACKET_CONTROL, DIG, id),\
159 uint32_t HDMI_AUDIO_PACKET_CONTROL; member
A Ddcn10_stream_encoder.c1256 REG_UPDATE(HDMI_AUDIO_PACKET_CONTROL, in enc1_se_setup_hdmi_audio()
/drivers/gpu/drm/radeon/
A Devergreen_hdmi.c381 WREG32(HDMI_AUDIO_PACKET_CONTROL + offset, in dce4_set_audio_packet()
A Drv770d.h690 #define HDMI_AUDIO_PACKET_CONTROL 0x7408 macro
A Devergreend.h535 #define HDMI_AUDIO_PACKET_CONTROL 0x7038 macro
/drivers/gpu/drm/amd/display/dc/resource/dcn35/
A Ddcn35_resource.h100 SRI_ARR(HDMI_AUDIO_PACKET_CONTROL, DIG, id),\
/drivers/gpu/drm/amd/display/dc/dio/dcn314/
A Ddcn314_dio_stream_encoder.h69 SRI(HDMI_AUDIO_PACKET_CONTROL, DIG, id),\
/drivers/gpu/drm/amd/display/dc/dio/dcn35/
A Ddcn35_dio_stream_encoder.h67 SRI(HDMI_AUDIO_PACKET_CONTROL, DIG, id),\
/drivers/gpu/drm/amd/display/dc/dio/dcn30/
A Ddcn30_dio_stream_encoder.h68 SRI(HDMI_AUDIO_PACKET_CONTROL, DIG, id),\
A Ddcn30_dio_stream_encoder.c770 REG_UPDATE(HDMI_AUDIO_PACKET_CONTROL, in enc3_se_setup_hdmi_audio()
/drivers/gpu/drm/amd/display/dc/resource/dcn401/
A Ddcn401_resource.h193 SRI_ARR(HDMI_AUDIO_PACKET_CONTROL, DIG, id), \
/drivers/gpu/drm/amd/amdgpu/
A Ddce_v6_0.c1632 tmp = REG_SET_FIELD(tmp, HDMI_AUDIO_PACKET_CONTROL, HDMI_AUDIO_DELAY_EN, 1); in dce_v6_0_audio_set_packet()
1633 tmp = REG_SET_FIELD(tmp, HDMI_AUDIO_PACKET_CONTROL, HDMI_AUDIO_PACKETS_PER_LINE, 3); in dce_v6_0_audio_set_packet()
A Ddce_v10_0.c1660 tmp = REG_SET_FIELD(tmp, HDMI_AUDIO_PACKET_CONTROL, HDMI_AUDIO_DELAY_EN, 1); in dce_v10_0_afmt_setmode()
1662 tmp = REG_SET_FIELD(tmp, HDMI_AUDIO_PACKET_CONTROL, HDMI_AUDIO_PACKETS_PER_LINE, 3); in dce_v10_0_afmt_setmode()
A Ddce_v11_0.c1709 tmp = REG_SET_FIELD(tmp, HDMI_AUDIO_PACKET_CONTROL, HDMI_AUDIO_DELAY_EN, 1); in dce_v11_0_afmt_setmode()
1711 tmp = REG_SET_FIELD(tmp, HDMI_AUDIO_PACKET_CONTROL, HDMI_AUDIO_PACKETS_PER_LINE, 3); in dce_v11_0_afmt_setmode()
/drivers/gpu/drm/amd/display/dc/resource/dcn32/
A Ddcn32_resource.h282 SRI_ARR(HDMI_AUDIO_PACKET_CONTROL, DIG, id), \

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