| /drivers/gpu/drm/radeon/ |
| A D | evergreen_hdmi.c | 397 WREG32_OR(HDMI_GC + offset, HDMI_GC_AVMUTE); in dce4_set_mute()
399 WREG32_AND(HDMI_GC + offset, ~HDMI_GC_AVMUTE); in dce4_set_mute()
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| A D | rv770d.h | 726 # define HDMI_GC_AVMUTE (1 << 0) macro
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| A D | evergreend.h | 577 # define HDMI_GC_AVMUTE (1 << 0) macro
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| /drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dce_stream_encoder.h | 147 SE_SF(HDMI_GC, HDMI_GC_AVMUTE, mask_sh),\
232 SE_SF(DIG0_HDMI_GC, HDMI_GC_AVMUTE, mask_sh),\
417 uint8_t HDMI_GC_AVMUTE; member
549 uint32_t HDMI_GC_AVMUTE; member
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| A D | dce_stream_encoder.c | 644 REG_UPDATE(HDMI_GC, HDMI_GC_AVMUTE, 0); in dce110_stream_encoder_hdmi_set_stream_attribute()
1019 REG_UPDATE(HDMI_GC, HDMI_GC_AVMUTE, value); in dce110_stream_encoder_set_avmute()
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| /drivers/gpu/drm/amd/display/dc/dio/dcn314/ |
| A D | dcn314_dio_stream_encoder.c | 272 REG_UPDATE(HDMI_GC, HDMI_GC_AVMUTE, 0); in enc314_stream_encoder_hdmi_set_stream_attribute()
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| A D | dcn314_dio_stream_encoder.h | 129 SE_SF(DIG0_HDMI_GC, HDMI_GC_AVMUTE, mask_sh),\
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| /drivers/gpu/drm/amd/display/dc/dio/dcn35/ |
| A D | dcn35_dio_stream_encoder.c | 218 REG_UPDATE(HDMI_GC, HDMI_GC_AVMUTE, 0); in enc35_stream_encoder_hdmi_set_stream_attribute()
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| A D | dcn35_dio_stream_encoder.h | 130 SE_SF(DIG0_HDMI_GC, HDMI_GC_AVMUTE, mask_sh),\
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| /drivers/gpu/drm/amd/display/dc/dio/dcn32/ |
| A D | dcn32_dio_stream_encoder.c | 230 REG_UPDATE(HDMI_GC, HDMI_GC_AVMUTE, 0); in enc32_stream_encoder_hdmi_set_stream_attribute()
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| A D | dcn32_dio_stream_encoder.h | 50 SE_SF(DIG0_HDMI_GC, HDMI_GC_AVMUTE, mask_sh),\
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| /drivers/gpu/drm/amd/display/dc/dio/dcn401/ |
| A D | dcn401_dio_stream_encoder.h | 51 SE_SF(DIG0_HDMI_GC, HDMI_GC_AVMUTE, mask_sh),\
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| A D | dcn401_dio_stream_encoder.c | 229 REG_UPDATE(HDMI_GC, HDMI_GC_AVMUTE, 0); in enc401_stream_encoder_hdmi_set_stream_attribute()
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| /drivers/gpu/drm/amd/display/dc/dio/dcn10/ |
| A D | dcn10_stream_encoder.c | 596 REG_UPDATE(HDMI_GC, HDMI_GC_AVMUTE, 0); in enc1_stream_encoder_hdmi_set_stream_attribute()
1038 REG_UPDATE(HDMI_GC, HDMI_GC_AVMUTE, value); in enc1_stream_encoder_set_avmute()
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| A D | dcn10_stream_encoder.h | 220 SE_SF(DIG0_HDMI_GC, HDMI_GC_AVMUTE, mask_sh),\
428 type HDMI_GC_AVMUTE;\
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| /drivers/gpu/drm/amd/display/dc/dio/dcn30/ |
| A D | dcn30_dio_stream_encoder.h | 130 SE_SF(DIG0_HDMI_GC, HDMI_GC_AVMUTE, mask_sh),\
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| A D | dcn30_dio_stream_encoder.c | 707 REG_UPDATE(HDMI_GC, HDMI_GC_AVMUTE, 0); in enc3_stream_encoder_hdmi_set_stream_attribute()
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| /drivers/gpu/drm/amd/include/asic_reg/dce/ |
| A D | dce_11_0_enum.h | 2402 typedef enum HDMI_GC_AVMUTE { enum
2405 } HDMI_GC_AVMUTE; typedef
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| A D | dce_11_2_enum.h | 2829 typedef enum HDMI_GC_AVMUTE { enum
2832 } HDMI_GC_AVMUTE; typedef
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| /drivers/gpu/drm/amd/amdgpu/ |
| A D | dce_v6_0.c | 1651 tmp = REG_SET_FIELD(tmp, HDMI_GC, HDMI_GC_AVMUTE, mute ? 1 : 0); in dce_v6_0_audio_set_mute()
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| /drivers/gpu/drm/amd/include/ |
| A D | soc24_enum.h | 6791 typedef enum HDMI_GC_AVMUTE { enum
6794 } HDMI_GC_AVMUTE; typedef
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| A D | vega10_enum.h | 4497 typedef enum HDMI_GC_AVMUTE { enum
4500 } HDMI_GC_AVMUTE; typedef
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| A D | navi10_enum.h | 6896 typedef enum HDMI_GC_AVMUTE { enum
6899 } HDMI_GC_AVMUTE; typedef
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| A D | soc21_enum.h | 7061 typedef enum HDMI_GC_AVMUTE { enum
7064 } HDMI_GC_AVMUTE; typedef
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