| /drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dce_stream_encoder.h | 140 SE_SF(HDMI_VBI_PACKET_CONTROL, HDMI_GC_CONT, mask_sh),\ 225 SE_SF(DIG0_HDMI_VBI_PACKET_CONTROL, HDMI_GC_CONT, mask_sh),\ 409 uint8_t HDMI_GC_CONT; member 541 uint32_t HDMI_GC_CONT; member
|
| A D | dce_stream_encoder.c | 630 HDMI_GC_CONT, 1, in dce110_stream_encoder_hdmi_set_stream_attribute()
|
| /drivers/gpu/drm/amd/display/dc/dio/dcn314/ |
| A D | dcn314_dio_stream_encoder.c | 252 HDMI_GC_CONT, 1, in enc314_stream_encoder_hdmi_set_stream_attribute()
|
| A D | dcn314_dio_stream_encoder.h | 123 SE_SF(DIG0_HDMI_VBI_PACKET_CONTROL, HDMI_GC_CONT, mask_sh),\
|
| /drivers/gpu/drm/amd/display/dc/dio/dcn35/ |
| A D | dcn35_dio_stream_encoder.c | 198 HDMI_GC_CONT, 1, in enc35_stream_encoder_hdmi_set_stream_attribute()
|
| A D | dcn35_dio_stream_encoder.h | 124 SE_SF(DIG0_HDMI_VBI_PACKET_CONTROL, HDMI_GC_CONT, mask_sh),\
|
| /drivers/gpu/drm/amd/display/dc/dio/dcn32/ |
| A D | dcn32_dio_stream_encoder.c | 210 HDMI_GC_CONT, 1, in enc32_stream_encoder_hdmi_set_stream_attribute()
|
| A D | dcn32_dio_stream_encoder.h | 44 SE_SF(DIG0_HDMI_VBI_PACKET_CONTROL, HDMI_GC_CONT, mask_sh),\
|
| /drivers/gpu/drm/amd/display/dc/dio/dcn401/ |
| A D | dcn401_dio_stream_encoder.h | 45 SE_SF(DIG0_HDMI_VBI_PACKET_CONTROL, HDMI_GC_CONT, mask_sh),\
|
| A D | dcn401_dio_stream_encoder.c | 210 HDMI_GC_CONT, 1, in enc401_stream_encoder_hdmi_set_stream_attribute()
|
| /drivers/gpu/drm/amd/display/dc/dio/dcn10/ |
| A D | dcn10_stream_encoder.h | 213 SE_SF(DIG0_HDMI_VBI_PACKET_CONTROL, HDMI_GC_CONT, mask_sh),\ 420 type HDMI_GC_CONT;\
|
| A D | dcn10_stream_encoder.c | 582 HDMI_GC_CONT, 1, in enc1_stream_encoder_hdmi_set_stream_attribute()
|
| /drivers/gpu/drm/radeon/ |
| A D | evergreen_hdmi.c | 316 HDMI_GC_CONT); /* send general control packets every frame */ in dce4_set_vbi_packet()
|
| A D | rv770d.h | 706 # define HDMI_GC_CONT (1 << 5) /* 0 - once; 1 - every frame */ macro
|
| A D | evergreend.h | 556 # define HDMI_GC_CONT (1 << 5) /* 0 - once; 1 - every frame */ macro
|
| /drivers/gpu/drm/amd/display/dc/dio/dcn30/ |
| A D | dcn30_dio_stream_encoder.h | 124 SE_SF(DIG0_HDMI_VBI_PACKET_CONTROL, HDMI_GC_CONT, mask_sh),\
|
| A D | dcn30_dio_stream_encoder.c | 687 HDMI_GC_CONT, 1, in enc3_stream_encoder_hdmi_set_stream_attribute()
|
| /drivers/gpu/drm/amd/include/asic_reg/dce/ |
| A D | dce_11_0_enum.h | 2092 typedef enum HDMI_GC_CONT { enum 2095 } HDMI_GC_CONT; typedef
|
| A D | dce_11_2_enum.h | 2555 typedef enum HDMI_GC_CONT { enum 2558 } HDMI_GC_CONT; typedef
|
| /drivers/gpu/drm/amd/amdgpu/ |
| A D | dce_v6_0.c | 1479 tmp = REG_SET_FIELD(tmp, HDMI_VBI_PACKET_CONTROL, HDMI_GC_CONT, 1); in dce_v6_0_audio_set_vbi_packet()
|
| A D | dce_v10_0.c | 1636 …tmp = REG_SET_FIELD(tmp, HDMI_VBI_PACKET_CONTROL, HDMI_GC_CONT, 1); /* send general control packet… in dce_v10_0_afmt_setmode()
|
| A D | dce_v11_0.c | 1685 …tmp = REG_SET_FIELD(tmp, HDMI_VBI_PACKET_CONTROL, HDMI_GC_CONT, 1); /* send general control packet… in dce_v11_0_afmt_setmode()
|
| /drivers/gpu/drm/amd/include/ |
| A D | soc24_enum.h | 6809 typedef enum HDMI_GC_CONT { enum 6812 } HDMI_GC_CONT; typedef
|
| A D | vega10_enum.h | 3965 typedef enum HDMI_GC_CONT { enum 3968 } HDMI_GC_CONT; typedef
|
| A D | navi10_enum.h | 6434 typedef enum HDMI_GC_CONT { enum 6437 } HDMI_GC_CONT; typedef
|