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Searched refs:HEAD_ADDR (Results 1 – 8 of 8) sorted by relevance

/drivers/gpu/drm/xe/regs/
A Dxe_engine_regs.h54 #define HEAD_ADDR REG_GENMASK(20, 2) macro
/drivers/gpu/drm/i915/gt/
A Dintel_engine_regs.h17 #define HEAD_ADDR 0x001FFFFC macro
A Dintel_engine_cs.c1677 ENGINE_READ_FW(engine, RING_HEAD) & HEAD_ADDR, in intel_engine_stop_cs()
1685 if ((ENGINE_READ_FW(engine, RING_HEAD) & HEAD_ADDR) != in intel_engine_stop_cs()
1852 if ((ENGINE_READ(engine, RING_HEAD) & HEAD_ADDR) != in ring_is_idle()
2094 ENGINE_READ(engine, RING_HEAD) & HEAD_ADDR); in intel_engine_print_registers()
A Dintel_ring_submission.c190 return (ENGINE_READ_FW(engine, RING_HEAD) & HEAD_ADDR) == 0; in stop_ring()
A Dintel_execlists_submission.c1968 ENGINE_READ(engine, RING_HEAD) & HEAD_ADDR, in process_csb()
/drivers/gpu/drm/xe/
A Dxe_lrc.c1412 return xe_lrc_read_indirect_ctx_reg(lrc, INDIRECT_CTX_RING_HEAD) & HEAD_ADDR; in xe_lrc_ring_head()
1414 return xe_lrc_read_ctx_reg(lrc, CTX_RING_HEAD) & HEAD_ADDR; in xe_lrc_ring_head()
/drivers/gpu/drm/i915/
A Di915_pmu.c404 (head & HEAD_ADDR) != (tail & TAIL_ADDR)) in gen2_engine_sample()
/drivers/infiniband/hw/hfi1/
A Dsdma.c2010 write_sde_csr(sde, SD(HEAD_ADDR), sde->head_phys); in init_sdma_regs()
2074 sdma_dumpstate_helper(SD(HEAD_ADDR)); in sdma_dumpstate()

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