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Searched refs:HECI_H_GS1 (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/xe/regs/
A Dxe_gsc_regs.h46 #define HECI_H_GS1(base) XE_REG((base) + 0xc4c) macro
/drivers/gpu/drm/i915/gt/
A Dintel_reset.c743 HECI_H_GS1(MTL_GSC_HECI2_BASE), in wa_14015076503_start()
763 HECI_H_GS1(MTL_GSC_HECI2_BASE), in wa_14015076503_end()
/drivers/gpu/drm/xe/
A Dxe_gsc.c599 xe_mmio_rmw32(&gt->mmio, HECI_H_GS1(MTL_GSC_HECI2_BASE), gs1_clr, gs1_set); in xe_gsc_wa_14015076503()
/drivers/gpu/drm/i915/
A Di915_reg.h288 #define HECI_H_GS1(base) _MMIO((base) + 0xc4c) macro

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