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Searched refs:HIVE_GP_DEV_IRQ_SW_PIN_0_BIT_ID (Results 1 – 4 of 4) sorted by relevance

/drivers/staging/media/atomisp/pci/hive_isp_css_common/
A Dirq_global.h21 #define IRQ_SW_CHANNEL_OFFSET HIVE_GP_DEV_IRQ_SW_PIN_0_BIT_ID
/drivers/staging/media/atomisp/pci/
A Dirq_types_hrt.h46 hrt_isp_css_irq_sw_pin_0 = HIVE_GP_DEV_IRQ_SW_PIN_0_BIT_ID,
A Dhive_isp_css_defs.h147 #define HIVE_GP_DEV_IRQ_SW_PIN_0_BIT_ID 28 macro
/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/
A Dirq_local.h66 virq_sw_pin_0 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_SW_PIN_0_BIT_ID,

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