Searched refs:I40E_L4_DST_MASK (Results 1 – 3 of 3) sorted by relevance
3196 if (i_set & I40E_L4_DST_MASK) in i40e_get_rxfh_fields()3483 if (input_set & I40E_L4_DST_MASK) in i40e_get_ethtool_fdir_entry()3584 i_set |= I40E_L4_DST_MASK; in i40e_get_rss_hash_bits()3586 i_set &= ~I40E_L4_DST_MASK; in i40e_get_rss_hash_bits()4237 old_value = !!(old & I40E_L4_DST_MASK); in i40e_print_input_set()4238 new_value = !!(new & I40E_L4_DST_MASK); in i40e_print_input_set()4401 new_mask |= I40E_L4_DST_MASK; in i40e_check_fdir_input_set()4403 new_mask &= ~I40E_L4_DST_MASK; in i40e_check_fdir_input_set()4449 new_mask |= I40E_L4_DST_MASK; in i40e_check_fdir_input_set()4451 new_mask &= ~I40E_L4_DST_MASK; in i40e_check_fdir_input_set()
1274 #define I40E_L4_DST_MASK (0x1ULL << I40E_L4_DST_SHIFT) macro
9150 I40E_L4_SRC_MASK | I40E_L4_DST_MASK); in i40e_fdir_filter_exit()9155 I40E_L4_SRC_MASK | I40E_L4_DST_MASK); in i40e_fdir_filter_exit()9160 I40E_L4_SRC_MASK | I40E_L4_DST_MASK); in i40e_fdir_filter_exit()9165 I40E_L4_SRC_MASK | I40E_L4_DST_MASK); in i40e_fdir_filter_exit()9170 I40E_L4_SRC_MASK | I40E_L4_DST_MASK); in i40e_fdir_filter_exit()9175 I40E_L4_SRC_MASK | I40E_L4_DST_MASK); in i40e_fdir_filter_exit()9615 I40E_L4_SRC_MASK | I40E_L4_DST_MASK); in i40e_reenable_fdir_atr()
Completed in 44 milliseconds