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Searched refs:IER (Results 1 – 25 of 28) sorted by relevance

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/drivers/tty/
A Damiserial.c140 info->IER &= ~UART_IER_THRI; in rs_stop()
159 info->IER |= UART_IER_THRI; in rs_start()
277 info->IER &= ~UART_IER_THRI; in transmit_chars()
383 if(info->IER & UART_IER_MSI) in ser_vbl_int()
485 info->IER = UART_IER_MSI; in startup()
543 info->IER = 0; in shutdown()
634 info->IER &= ~UART_IER_MSI; in change_speed()
636 info->IER |= UART_IER_MSI; in change_speed()
639 info->IER |= UART_IER_MSI; in change_speed()
642 info->IER |= UART_IER_MSI; in change_speed()
[all …]
A Dmxser.c439 info->IER |= UART_IER_THRI; in __mxser_start_tx()
454 info->IER &= ~UART_IER_THRI; in __mxser_stop_tx()
624 info->IER &= ~UART_IER_MSI; in mxser_change_speed()
628 info->IER |= UART_IER_MSI; in mxser_change_speed()
639 info->IER |= UART_IER_MSI; in mxser_change_speed()
785 info->IER |= MOXA_MUST_IER_EGDAI; in mxser_activate()
818 info->IER &= ~UART_IER_RLSI; in mxser_stop_rx()
843 info->IER = 0; in mxser_shutdown_port()
1284 info->IER |= UART_IER_THRI; in mxser_throttle()
1310 info->IER |= UART_IER_THRI; in mxser_unthrottle()
[all …]
/drivers/macintosh/
A Dvia-cuda.c54 #define IER (14*RS) /* Interrupt enable register */ macro
272 out_8(&via[IER], IER_SET|SR_INT); /* enable interrupt from SR */ in find_via_cuda()
378 out_8(&via[IER], 0x7f); /* disable interrupts from VIA */ in cuda_init_via()
379 (void)in_8(&via[IER]); in cuda_init_via()
381 out_8(&via[IER], SR_INT); /* disable SR interrupt from VIA */ in cuda_init_via()
A Dvia-pmu.c98 #define IER (14*RS) /* Interrupt enable register */ macro
354 out_8(&via1[IER], IER_CLR | 0x7f); /* disable all intrs */ in find_via_pmu()
465 out_8(&via1[IER], IER_SET | SR_INT | CB1_INT); in via_pmu_start()
1316 out_8(&via1[IER], CB1_INT | IER_CLR); in pmu_suspend()
1340 out_8(&via1[IER], CB1_INT | IER_SET); in pmu_resume()
1611 intr, in_8(&via1[IER]), pmu_state); in via_pmu_interrupt()
1852 out_8(&via1[IER], IER_CLR | 0x7f); /* disable all intrs */ in restore_via_state()
1854 out_8(&via1[IER], IER_SET | SR_INT | CB1_INT); in restore_via_state()
A Dvia-macii.c55 #define IER (14*RS) /* Interrupt enable register */ macro
/drivers/net/hamradio/
A Dbaycom_ser_fdx.c94 #define IER(iobase) (iobase+1) macro
409 outb(0, IER(dev->base_addr)); in ser12_open()
426 outb(0x0a, IER(dev->base_addr)); in ser12_open()
450 outb(0, IER(dev->base_addr)); in ser12_close()
A Dbaycom_ser_hdx.c80 #define IER(iobase) (iobase+1) macro
476 outb(0, IER(dev->base_addr)); in ser12_open()
485 outb(2, IER(dev->base_addr)); in ser12_open()
508 outb(0, IER(dev->base_addr)); in ser12_close()
A Dyam.c151 #define IER(iobase) (iobase+1) macro
293 outb(0, IER(iobase)); in fpga_reset()
465 outb(0, IER(dev->base_addr)); in yam_set_uart()
480 outb(ENABLE_RTXINT, IER(dev->base_addr)); in yam_set_uart()
864 outb(0, IER(dev->base_addr)); in yam_open()
907 outb(0, IER(dev->base_addr)); in yam_close()
/drivers/irqchip/
A Dirq-xilinx-intc.c25 #define IER 0x08 /* Interrupt Enable Register */ macro
203 xintc_write(irqc, IER, 0); in xilinx_intc_of_init()
/drivers/clocksource/
A Dtimer-atmel-tcb.c101 writel(tcb_cache[i].imr, tcaddr + ATMEL_TC_REG(i, IER)); in tc_clksrc_resume()
186 writel(ATMEL_TC_CPCS, regs + ATMEL_TC_REG(2, IER)); in tc_set_oneshot()
211 writel(ATMEL_TC_CPCS, regs + ATMEL_TC_REG(2, IER)); in tc_set_periodic()
/drivers/usb/serial/
A Dio_16654.h32 #define IER 1 // ! Interrupt Enable Register macro
/drivers/spi/
A Dspi-at91-usart.c108 at91_usart_spi_writel(aus, IER, US_IR_RXRDY); in dma_callback()
250 at91_usart_spi_writel(aus, IER, US_IR_RXRDY); in at91_usart_spi_dma_transfer()
437 at91_usart_spi_writel(aus, IER, US_OVRE_RXRDY_IRQS); in at91_usart_spi_prepare_message()
A Dspi-atmel.c678 spi_writel(as, IER, SPI_BIT(RDRF) | SPI_BIT(OVRES)); in atmel_spi_next_xfer_single()
748 spi_writel(as, IER, SPI_BIT(RXFTHF) | SPI_BIT(OVRES)); in atmel_spi_next_xfer_fifo()
836 spi_writel(as, IER, SPI_BIT(OVRES)); in atmel_spi_next_xfer_dma_submit()
982 spi_writel(as, IER, SPI_BIT(RXBUFF) | SPI_BIT(OVRES)); in atmel_spi_pdc_next_xfer()
/drivers/iio/adc/
A Dat91-sama5d2_adc.c110 u16 IER; member
264 .IER = 0x24,
299 .IER = 0x24,
841 at91_adc_writel(st, IER, BIT(channel)); in at91_adc_eoc_ena()
1013 at91_adc_writel(st, IER, AT91_SAMA5D2_IER_PEN); in at91_adc_configure_touch()
1260 at91_adc_writel(st, IER, AT91_SAMA5D2_IER_GOVRE); in at91_adc_dma_start()
1336 at91_adc_writel(st, IER, AT91_SAMA5D2_IER_DRDY); in at91_adc_buffer_prepare()
1654 at91_adc_writel(st, IER, AT91_SAMA5D2_IER_NOPEN | in at91_adc_pen_detect_interrupt()
1674 at91_adc_writel(st, IER, AT91_SAMA5D2_IER_PEN); in at91_adc_no_pen_detect_interrupt()
/drivers/power/reset/
A Dqnap-poweroff.c64 writel(0x00, UART1_REG(IER)); in qnap_power_off()
/drivers/video/fbdev/i810/
A Di810_regs.h44 #define IER 0x020A0 macro
/drivers/video/fbdev/
A Di740_reg.h229 #define IER 0x3030 macro
/drivers/media/common/saa7146/
A Dsaa7146_core.c384 saa7146_write(dev, IER, 0); in saa7146_init_one()
507 saa7146_write(dev, IER, 0); in saa7146_remove_one()
/drivers/gpu/drm/xe/
A Dxe_irq.c34 #define IER(offset) XE_REG(offset + 0xc) macro
71 xe_mmio_write32(mmio, IER(irqregs), bits); in unmask_and_enable()
87 xe_mmio_write32(mmio, IER(irqregs), 0); in mask_and_disable()
/drivers/net/wireless/admtek/
A Dadm8211.h30 __le32 IER; /* 0x38 CSR7 */ member
A Dadm8211.c1193 ADM8211_CSR_WRITE(IER, 0); in adm8211_hw_init()
1539 ADM8211_CSR_WRITE(IER, ADM8211_IER_NIE | ADM8211_IER_AIE | in adm8211_start()
1560 ADM8211_CSR_WRITE(IER, 0); in adm8211_stop()
/drivers/net/ethernet/natsemi/
A Dns83820.c314 #define IER 0x18 macro
755 writel(1, dev->base + IER); in ns83820_setup_rx()
1376 writel(0, dev->base + IER);
1377 readl(dev->base + IER);
/drivers/net/ethernet/cadence/
A Dmacb_main.c754 queue_writel(queue, IER, in macb_mac_link_up()
1179 queue_writel(queue, IER, MACB_TX_INT_FLAGS); in macb_tx_error_task()
1680 queue_writel(queue, IER, bp->rx_intr_mask); in macb_rx_poll()
1766 queue_writel(queue, IER, MACB_BIT(TCOMP)); in macb_tx_poll()
1817 queue_writel(queue, IER, in macb_hresp_error_task()
4302 queue->IER = GEM_IER(hw_q - 1); in macb_init()
4317 queue->IER = MACB_IER; in macb_init()
4532 macb_writel(lp, IER, MACB_BIT(RCOMP) | in at91ether_start()
5500 queue_writel(bp->queues, IER, GEM_BIT(WOL)); in macb_suspend()
5512 queue_writel(bp->queues, IER, MACB_BIT(WOL)); in macb_suspend()
/drivers/mtd/nand/raw/
A Dtegra_nand.c52 #define IER 0x0c macro
1194 writel_relaxed(INT_MASK, ctrl->regs + IER); in tegra_nand_probe()
/drivers/counter/
A Dmicrochip-tcb-capture.c460 ret = regmap_write(priv->regmap, ATMEL_TC_REG(priv->channel[0], IER), ATMEL_TC_DEF_IRQS); in mchp_tc_irq_enable()

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