Searched refs:IIR (Results 1 – 8 of 8) sorted by relevance
| /drivers/gpu/drm/xe/ |
| A D | xe_irq.c | 33 #define IIR(offset) XE_REG(offset + 0x8) macro
69 assert_iir_is_zero(mmio, IIR(irqregs)); in unmask_and_enable()
90 xe_mmio_write32(mmio, IIR(irqregs), ~0); in mask_and_disable()
91 xe_mmio_read32(mmio, IIR(irqregs)); in mask_and_disable()
92 xe_mmio_write32(mmio, IIR(irqregs), ~0); in mask_and_disable()
93 xe_mmio_read32(mmio, IIR(irqregs)); in mask_and_disable()
120 iir = xe_mmio_read32(mmio, IIR(GU_MISC_IRQ_OFFSET)); in gu_misc_irq_ack()
122 xe_mmio_write32(mmio, IIR(GU_MISC_IRQ_OFFSET), iir); in gu_misc_irq_ack()
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| /drivers/net/hamradio/ |
| A D | baycom_ser_fdx.c | 95 #define IIR(iobase) (iobase+2) macro
258 if ((iir = inb(IIR(dev->base_addr))) & 1) in ser12_interrupt()
302 iir = inb(IIR(dev->base_addr)); in ser12_interrupt()
360 u = uart_tab[(inb(IIR(iobase)) >> 6) & 3]; in ser12_check_uart()
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| A D | baycom_ser_hdx.c | 81 #define IIR(iobase) (iobase+2) macro
371 if ((iir = inb(IIR(dev->base_addr))) & 1) in ser12_interrupt()
401 iir = inb(IIR(dev->base_addr)); in ser12_interrupt()
442 u = uart_tab[(inb(IIR(iobase)) >> 6) & 3]; in ser12_check_uart()
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| A D | yam.c | 152 #define IIR(iobase) (iobase+2) macro
513 u = uart_tab[(inb(IIR(iobase)) >> 6) & 3]; in yam_check_uart()
744 while ((iir = IIR_MASK & inb(IIR(dev->base_addr))) != IIR_NOPEND) { in yam_interrupt()
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| /drivers/video/fbdev/i810/ |
| A D | i810_regs.h | 45 #define IIR 0x020A4 macro
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| A D | i810_accel.c | 43 i810_readw(IIR, mmio), in i810_report_error()
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| /drivers/video/fbdev/ |
| A D | i740_reg.h | 230 #define IIR 0x3032 macro
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| /drivers/gpu/drm/gma500/ |
| A D | psb_intel_reg.h | 752 #define IIR 0x020a4 macro
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