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Searched refs:IMR (Results 1 – 22 of 22) sorted by relevance

/drivers/pci/controller/
A Dpcie-xilinx-cpm.c46 IMR(LINK_DOWN) | \
47 IMR(HOT_RESET) | \
49 IMR(CFG_TIMEOUT) | \
50 IMR(CORRECTABLE) | \
51 IMR(NONFATAL) | \
52 IMR(FATAL) | \
55 IMR(INTX) | \
56 IMR(PM_PME_RCVD) | \
58 IMR(SLV_UNEXP) | \
59 IMR(SLV_COMPL) | \
[all …]
A Dpcie-xilinx-dma-pl.c40 IMR(LINK_DOWN) | \
41 IMR(HOT_RESET) | \
42 IMR(CFG_TIMEOUT) | \
43 IMR(CORRECTABLE) | \
44 IMR(NONFATAL) | \
45 IMR(FATAL) | \
46 IMR(INTX) | \
47 IMR(MSI) | \
49 IMR(SLV_UNEXP) | \
50 IMR(SLV_COMPL) | \
[all …]
/drivers/pci/controller/dwc/
A Dpcie-amd-mdb.c41 #define IMR(x) BIT(AMD_MDB_PCIE_INTR_ ##x) macro
44 IMR(CMPL_TIMEOUT) | \
45 IMR(PM_PME_RCVD) | \
46 IMR(PME_TO_ACK_RCVD) | \
47 IMR(MISC_CORRECTABLE) | \
48 IMR(NONFATAL) | \
49 IMR(FATAL) | \
/drivers/net/ethernet/realtek/
A Datp.c483 write_reg(ioaddr, IMR, ISR_RxOK | ISR_TxErr | ISR_TxOK); in hardware_init()
484 write_reg_high(ioaddr, IMR, ISRh_RxErr); in hardware_init()
569 write_reg(ioaddr, IMR, 0); in atp_send_packet()
570 write_reg_high(ioaddr, IMR, 0); in atp_send_packet()
584 write_reg(ioaddr, IMR, ISR_RxOK | ISR_TxErr | ISR_TxOK); in atp_send_packet()
585 write_reg_high(ioaddr, IMR, ISRh_RxErr); in atp_send_packet()
613 write_reg(ioaddr, IMR, 0); in atp_interrupt()
706 write_reg(ioaddr, IMR, ISR_RxOK | ISR_TxErr | ISR_TxOK); in atp_interrupt()
707 write_reg_high(ioaddr, IMR, ISRh_RxErr); /* Hmmm, really needed? */ in atp_interrupt()
A Datp.h40 ISR = 10, IMR = 11, /* Interrupt status and mask. */ enumerator
/drivers/gpu/drm/xe/
A Dxe_irq.c32 #define IMR(offset) XE_REG(offset + 0x4) macro
72 xe_mmio_write32(mmio, IMR(irqregs), ~bits); in unmask_and_enable()
75 xe_mmio_read32(mmio, IMR(irqregs)); in unmask_and_enable()
83 xe_mmio_write32(mmio, IMR(irqregs), ~0); in mask_and_disable()
85 xe_mmio_read32(mmio, IMR(irqregs)); in mask_and_disable()
/drivers/net/ethernet/natsemi/
A Dns83820.c313 #define IMR 0x14 macro
754 writel(dev->IMR_cache, dev->base + IMR); in ns83820_setup_rx()
775 writel(dev->IMR_cache, dev->base + IMR); in ns83820_cleanup_rx()
783 readl(dev->base + IMR); in ns83820_cleanup_rx()
937 writel(dev->IMR_cache, dev->base + IMR);
1375 writel(0, dev->base + IMR);
1426 writel(dev->IMR_cache, dev->base + IMR);
1483 writel(dev->IMR_cache, dev->base + IMR);
1497 writel(dev->IMR_cache, dev->base + IMR);
/drivers/net/ethernet/
A Dfealnx.c168 IMR = 0x38, /* interrupt mask */ enumerator
898 iowrite32(np->imrvalue, ioaddr + IMR); in netdev_open()
1123 iowrite32(0, ioaddr + IMR); in reset_and_disable_rxtx()
1158 iowrite32(np->imrvalue, ioaddr + IMR); in enable_rxtx()
1438 iowrite32(0, ioaddr + IMR); in intr_handler()
1598 iowrite32(np->imrvalue, ioaddr + IMR); in intr_handler()
1898 iowrite32(0x0000, ioaddr + IMR); in netdev_close()
/drivers/video/fbdev/i810/
A Di810_regs.h46 #define IMR 0x020A8 macro
A Di810_main.c583 i810_writew(IMR, mmio, par->hw_state.imr); in i810_restore_2d()
661 par->hw_state.imr = i810_readw(IMR, mmio); in i810_save_2d()
/drivers/video/fbdev/
A Di740_reg.h231 #define IMR 0x3034 macro
/drivers/net/wireless/realtek/rtl818x/
A Drtl818x.h203 __le32 IMR; /* 0x6c - Interrupt mask reg for 8187se */ member
/drivers/net/ethernet/via/
A Dvia-velocity.h986 volatile __le32 IMR; member
1151 #define mac_write_int_mask(mask, regs) writel((mask),&((regs)->IMR));
/drivers/iio/adc/
A Dat91-sama5d2_adc.c129 u16 IMR; member
266 .IMR = 0x2c,
301 .IMR = 0x2c,
820 *status = at91_adc_readl(st, IMR); in at91_adc_irq_mask()
/drivers/clocksource/
A Dtimer-atmel-tcb.c79 tcb_cache[i].imr = readl(tcaddr + ATMEL_TC_REG(i, IMR)); in tc_clksrc_suspend()
/drivers/counter/
A Dmicrochip-tcb-capture.c419 regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], IMR), &mask); in mchp_tc_isr()
/drivers/gpu/drm/gma500/
A Dpsb_intel_reg.h753 #define IMR 0x020a8 macro
/drivers/spi/
A Dspi-atmel.c1124 imr = spi_readl(as, IMR); in atmel_spi_pio_interrupt()
1181 imr = spi_readl(as, IMR); in atmel_spi_pdc_interrupt()
/drivers/net/wireless/realtek/rtl818x/rtl8180/
A Ddev.c724 rtl818x_iowrite32(priv, &priv->map->IMR, in rtl8180_int_enable()
742 rtl818x_iowrite32(priv, &priv->map->IMR, 0); in rtl8180_int_disable()
/drivers/net/ethernet/cadence/
A Dmacb.h1215 unsigned int IMR; member
A Dmacb_main.c3429 regs_buff[7] = macb_readl(bp, IMR); in macb_get_regs()
4304 queue->IMR = GEM_IMR(hw_q - 1); in macb_init()
4319 queue->IMR = MACB_IMR; in macb_init()
/drivers/platform/x86/
A DKconfig910 Quark contains a set of eight IMR registers and makes use of those

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