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Searched refs:INVALID_PIPE (Results 1 – 14 of 14) sorted by relevance

/drivers/gpu/drm/i915/display/
A Dintel_pps.c39 case INVALID_PIPE: in pps_name()
200 return INVALID_PIPE; in vlv_find_free_pps()
220 if (intel_dp->pps.vlv_pps_pipe != INVALID_PIPE) in vlv_power_sequencer_pipe()
315 return INVALID_PIPE; in vlv_initial_pps_pipe()
332 if (intel_dp->pps.vlv_pps_pipe == INVALID_PIPE) in vlv_initial_power_sequencer_setup()
336 if (intel_dp->pps.vlv_pps_pipe == INVALID_PIPE) in vlv_initial_power_sequencer_setup()
469 intel_dp->pps.vlv_pps_pipe = INVALID_PIPE; in vlv_pps_reset_all()
1191 intel_dp->pps.vlv_pps_pipe = INVALID_PIPE; in vlv_detach_power_sequencer()
1232 return INVALID_PIPE; in vlv_active_pipe()
1238 intel_dp->pps.vlv_pps_pipe = INVALID_PIPE; in vlv_pps_pipe_init()
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A Dintel_link_bw.c106 enum pipe max_bpp_pipe = INVALID_PIPE; in __intel_link_bw_reduce_bpp()
143 if (max_bpp_pipe == INVALID_PIPE) in __intel_link_bw_reduce_bpp()
193 if (pipe == INVALID_PIPE) in intel_link_bw_set_bpp_limit_for_pipe()
A Dintel_cdclk.c1881 if (pipe == INVALID_PIPE) in bxt_cdclk_cd2x_pipe()
1886 if (pipe == INVALID_PIPE) in bxt_cdclk_cd2x_pipe()
1891 if (pipe == INVALID_PIPE) in bxt_cdclk_cd2x_pipe()
2152 if (pipe != INVALID_PIPE) in _bxt_set_cdclk()
2715 pipe = INVALID_PIPE; in intel_set_cdclk_pre_plane_update()
2722 pipe = INVALID_PIPE; in intel_set_cdclk_pre_plane_update()
2769 pipe = INVALID_PIPE; in intel_set_cdclk_post_plane_update()
3148 cdclk_state->pipe = INVALID_PIPE; in intel_cdclk_duplicate_state()
3261 enum pipe pipe = INVALID_PIPE; in intel_modeset_calc_cdclk()
3311 pipe = INVALID_PIPE; in intel_modeset_calc_cdclk()
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A Dintel_display_limits.h15 INVALID_PIPE = -1, enumerator
A Dintel_connector.c214 return INVALID_PIPE; in intel_connector_get_pipe()
A Dintel_crtc.c183 crtc_state->hsw_workaround_pipe = INVALID_PIPE; in intel_crtc_state_reset()
A Dskl_watermark.c3509 return INVALID_PIPE; in intel_mbus_joined_pipe()
3523 if (pipe != INVALID_PIPE) in mbus_ctl_join_update()
3545 pipe != INVALID_PIPE ? pipe_name(pipe) : '*'); in intel_dbuf_mbus_join_update()
3591 if (pipe != INVALID_PIPE) { in intel_dbuf_mbus_post_ddb_update()
3704 mbus_ctl_join_update(display, dbuf_state, INVALID_PIPE); in skl_mbus_sanitize()
A Dintel_lvds.c998 intel_backlight_setup(connector, INVALID_PIPE); in intel_lvds_init()
A Dintel_display.c1740 if (display->platform.haswell && hsw_workaround_pipe != INVALID_PIPE) { in hsw_crtc_enable()
5637 enum pipe first_pipe = INVALID_PIPE, enabled_pipe = INVALID_PIPE; in hsw_mode_set_planes_workaround()
5665 crtc_state->hsw_workaround_pipe = INVALID_PIPE; in hsw_mode_set_planes_workaround()
5672 if (enabled_pipe != INVALID_PIPE) in hsw_mode_set_planes_workaround()
5678 if (enabled_pipe != INVALID_PIPE) in hsw_mode_set_planes_workaround()
6232 *failed_pipe = INVALID_PIPE; in intel_atomic_check_config()
A Dicl_dsi.c1983 intel_backlight_setup(intel_connector, INVALID_PIPE); in icl_dsi_init()
A Dvlv_dsi.c2046 intel_backlight_setup(connector, INVALID_PIPE); in vlv_dsi_init()
A Dintel_display_irq.c1252 enum pipe pipe = INVALID_PIPE; in gen11_dsi_te_interrupt_handler()
A Dintel_dp.c6480 enum pipe pipe = INVALID_PIPE; in intel_edp_backlight_setup()
/drivers/gpu/drm/i915/gvt/
A Dreg.h81 (INVALID_PIPE)))); })

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