Searched refs:IPP_SRCDST_FORMAT (Results 1 – 3 of 3) sorted by relevance
| /drivers/gpu/drm/exynos/ |
| A D | exynos_drm_scaler.c | 619 { IPP_SRCDST_FORMAT(NV21, scaler_5420_two_pixel_hv_limits) },
622 { IPP_SRCDST_FORMAT(NV12, scaler_5420_two_pixel_hv_limits) },
628 { IPP_SRCDST_FORMAT(YUYV, scaler_5420_two_pixel_h_limits) },
631 { IPP_SRCDST_FORMAT(UYVY, scaler_5420_two_pixel_h_limits) },
634 { IPP_SRCDST_FORMAT(YVYU, scaler_5420_two_pixel_h_limits) },
637 { IPP_SRCDST_FORMAT(NV61, scaler_5420_two_pixel_h_limits) },
640 { IPP_SRCDST_FORMAT(NV16, scaler_5420_two_pixel_h_limits) },
646 { IPP_SRCDST_FORMAT(NV42, scaler_5420_one_pixel_limits) },
649 { IPP_SRCDST_FORMAT(NV24, scaler_5420_one_pixel_limits) },
652 { IPP_SRCDST_FORMAT(YUV444, scaler_5420_one_pixel_limits) },
[all …]
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| A D | exynos_drm_rotator.c | 392 { IPP_SRCDST_FORMAT(XRGB8888, rotator_s5pv210_rbg888_limits) },
393 { IPP_SRCDST_FORMAT(NV12, rotator_s5pv210_yuv_limits) },
397 { IPP_SRCDST_FORMAT(XRGB8888, rotator_4210_rbg888_limits) },
398 { IPP_SRCDST_FORMAT(NV12, rotator_4210_yuv_limits) },
402 { IPP_SRCDST_FORMAT(XRGB8888, rotator_4412_rbg888_limits) },
403 { IPP_SRCDST_FORMAT(NV12, rotator_4412_yuv_limits) },
407 { IPP_SRCDST_FORMAT(XRGB8888, rotator_5250_rbg888_limits) },
408 { IPP_SRCDST_FORMAT(NV12, rotator_4412_yuv_limits) },
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| A D | exynos_drm_ipp.h | 118 #define IPP_SRCDST_FORMAT(f, l) IPP_SRCDST_MFORMAT(f, 0, l) macro
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