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Searched refs:ISR (Results 1 – 25 of 34) sorted by relevance

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/drivers/net/wireless/ath/wil6210/
A DKconfig20 bool "Use Clear-On-Read mode for ISR registers for wil6210"
24 ISR registers on wil6210 chip may operate in either
28 For ISR debug, use W1C (say n); is allows to monitor ISR
29 registers with debugfs. If COR were used, ISR would
/drivers/net/ethernet/realtek/
A Datp.c618 int status = read_nibble(ioaddr, ISR); in atp_interrupt()
624 write_reg(ioaddr, ISR, ISR_RxOK); /* Clear the Rx interrupt. */ in atp_interrupt()
637 write_reg_high(ioaddr, ISR, ISRh_RxErr); in atp_interrupt()
651 write_reg(ioaddr, ISR, ISR_TxErr + ISR_TxOK); in atp_interrupt()
A Datp.h40 ISR = 10, IMR = 11, /* Interrupt status and mask. */ enumerator
/drivers/net/ethernet/
A Dfealnx.c167 ISR = 0x34, /* interrupt status */ enumerator
897 iowrite32(FBE | TUNF | CNTOVF | RBU | TI | RI, ioaddr + ISR); in netdev_open()
1086 "config %8.8x.\n", dev->name, ioread32(ioaddr + ISR), in netdev_timer()
1157 iowrite32(FBE | TUNF | CNTOVF | RBU | TI | RI, ioaddr + ISR); in enable_rxtx()
1197 dev->name, ioread32(ioaddr + ISR)); in fealnx_tx_timeout()
1441 u32 intr_status = ioread32(ioaddr + ISR); in intr_handler()
1444 iowrite32(intr_status, ioaddr + ISR); in intr_handler()
1596 dev->name, ioread32(ioaddr + ISR)); in intr_handler()
/drivers/net/ethernet/via/
A Dvia-velocity.h985 volatile __le32 ISR; /* 0x24 */ member
1147 #define mac_read_isr(regs) readl(&((regs)->ISR))
1148 #define mac_write_isr(regs, x) writel((x),&((regs)->ISR))
1149 #define mac_clear_isr(regs) writel(0xffffffffL,&((regs)->ISR))
/drivers/net/ethernet/cadence/
A Dmacb_main.c1835 status = queue_readl(queue, ISR); in macb_wol_interrupt()
1864 status = queue_readl(queue, ISR); in gem_wol_interrupt()
1894 status = queue_readl(queue, ISR); in macb_interrupt()
1906 queue_writel(queue, ISR, -1); in macb_interrupt()
2677 queue_readl(queue, ISR); in macb_reset_hw()
2679 queue_writel(queue, ISR, -1); in macb_reset_hw()
4316 queue->ISR = MACB_ISR; in macb_init()
4707 intstatus = macb_readl(lp, ISR); in at91ether_interrupt()
5469 queue_readl(queue, ISR); in macb_suspend()
5471 queue_writel(queue, ISR, -1); in macb_suspend()
[all …]
A Dmacb.h1212 unsigned int ISR; member
/drivers/usb/serial/
A Dio_16654.h34 #define ISR 2 // Interrupt Status Register (Read) macro
/drivers/mtd/nand/raw/
A Dtegra_nand.c45 #define ISR 0x08 macro
256 isr = readl_relaxed(ctrl->regs + ISR); in tegra_nand_irq()
287 writel_relaxed(isr, ctrl->regs + ISR); in tegra_nand_irq()
339 isr = readl_relaxed(ctrl->regs + ISR); in tegra_nand_controller_abort()
340 writel_relaxed(isr, ctrl->regs + ISR); in tegra_nand_controller_abort()
/drivers/video/fbdev/i810/
A Di810_regs.h47 #define ISR 0x020AC macro
/drivers/video/fbdev/
A Di740_reg.h232 #define ISR 0x3036 macro
/drivers/media/common/saa7146/
A Dsaa7146_core.c276 ack_isr = isr = saa7146_read(dev, ISR); in interrupt_hw()
322 saa7146_write(dev, ISR, ack_isr); in interrupt_hw()
/drivers/irqchip/
A Dirq-xilinx-intc.c23 #define ISR 0x00 /* Interrupt Status Register */ macro
/drivers/iio/adc/
A Dat91-sama5d2_adc.c131 u16 ISR; member
267 .ISR = 0x30,
302 .ISR = 0x30,
811 *status = at91_adc_readl(st, ISR); in at91_adc_irq_status()
1494 u32 status = at91_adc_readl(st, ISR); in at91_adc_trigger_handler_dma()
/drivers/net/wireless/realtek/rtlwifi/rtl8192de/
A Dhw.c1020 intvec->inta = rtl_read_dword(rtlpriv, ISR) & rtlpci->irq_mask[0]; in rtl92de_interrupt_recognized()
1021 rtl_write_dword(rtlpriv, ISR, intvec->inta); in rtl92de_interrupt_recognized()
/drivers/net/wireless/realtek/rtlwifi/rtl8192se/
A Dhw.c1544 intvec->inta = rtl_read_dword(rtlpriv, ISR) & rtlpci->irq_mask[0]; in rtl92se_interrupt_recognized()
1545 rtl_write_dword(rtlpriv, ISR, intvec->inta); in rtl92se_interrupt_recognized()
1547 intvec->intb = rtl_read_dword(rtlpriv, ISR + 4) & rtlpci->irq_mask[1]; in rtl92se_interrupt_recognized()
1548 rtl_write_dword(rtlpriv, ISR + 4, intvec->intb); in rtl92se_interrupt_recognized()
A Dreg.h236 #define ISR 0x0308 macro
/drivers/net/wireless/intel/ipw2x00/
A DKconfig146 debug option enables debug on hot paths (e.g Tx, Rx, ISR) and
/drivers/net/ethernet/natsemi/
A Dns83820.c312 #define ISR 0x10 macro
1399 isr = readl(dev->base + ISR);
1570 isr = readl(dev->base + ISR);
/drivers/gpu/drm/gma500/
A Dpsb_intel_reg.h754 #define ISR 0x020ac macro
/drivers/net/wireless/realtek/rtlwifi/rtl8192d/
A Dreg.h338 #define ISR REG_HISR macro
/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/
A Dhw.c1362 intvec->inta = rtl_read_dword(rtlpriv, ISR) & rtlpci->irq_mask[0]; in rtl92ce_interrupt_recognized()
1363 rtl_write_dword(rtlpriv, ISR, intvec->inta); in rtl92ce_interrupt_recognized()
/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/
A Dhw.c1451 intvec->inta = rtl_read_dword(rtlpriv, ISR) & rtlpci->irq_mask[0]; in rtl88ee_interrupt_recognized()
1452 rtl_write_dword(rtlpriv, ISR, intvec->inta); in rtl88ee_interrupt_recognized()
/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/
A Dhw.c1679 intvec->inta = rtl_read_dword(rtlpriv, ISR) & rtlpci->irq_mask[0]; in rtl92ee_interrupt_recognized()
1680 rtl_write_dword(rtlpriv, ISR, intvec->inta); in rtl92ee_interrupt_recognized()
/drivers/net/wireless/realtek/rtlwifi/rtl8723be/
A Dhw.c1670 intvec->inta = rtl_read_dword(rtlpriv, ISR) & rtlpci->irq_mask[0]; in rtl8723be_interrupt_recognized()
1671 rtl_write_dword(rtlpriv, ISR, intvec->inta); in rtl8723be_interrupt_recognized()

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