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Searched refs:IS_GEN9_LP (Results 1 – 12 of 12) sorted by relevance

/drivers/gpu/drm/i915/gt/
A Dintel_sseu.c388 intel_sseu_set_info(sseu, IS_GEN9_LP(i915) ? 1 : 3, in gen9_sseu_info_init()
389 IS_GEN9_LP(i915) ? 3 : 4, 8); in gen9_sseu_info_init()
458 !IS_GEN9_LP(i915) && hweight8(sseu->slice_mask) > 1; in gen9_sseu_info_init()
460 IS_GEN9_LP(i915) && intel_sseu_subslice_total(sseu) > 1; in gen9_sseu_info_init()
463 if (IS_GEN9_LP(i915)) { in gen9_sseu_info_init()
A Dintel_gt_clock_utils.c95 freq = IS_GEN9_LP(uncore->i915) ? 19200000 : 24000000; in gen9_read_clock_frequency()
A Dintel_gtt.c453 else if (IS_GEN9_LP(i915)) in gtt_write_workarounds()
688 else if (IS_CHERRYVIEW(i915) || IS_GEN9_LP(i915)) in setup_private_pat()
A Dintel_wopcm.c96 if (IS_GEN9_LP(i915)) in context_reserved_size()
A Dintel_rc6.c503 if (IS_GEN9_LP(i915) && !bxt_check_bios_rc6_setup(rc6)) { in rc6_supported()
810 if (IS_GEN9_LP(i915)) { in intel_rc6_residency_ns()
A Dintel_sseu_debugfs.c148 if (IS_GEN9_LP(gt->i915)) { in gen9_sseu_device_status()
A Dintel_mocs.c499 } else if (IS_GEN9_LP(i915)) { in get_mocs_settings()
A Dintel_rps.c1104 if (IS_GEN9_LP(i915)) in intel_rps_read_state_cap()
1136 if (IS_GEN9_LP(i915)) { in __gen6_rps_get_freq_caps()
2276 if (IS_GEN9_LP(i915)) in rps_frequency_dump()
A Dintel_workarounds.c528 if (IS_GEN9_LP(i915)) in gen9_ctx_workarounds_init()
2470 if (IS_GEN9_LP(i915)) in rcs_engine_wa_init()
A Dintel_ggtt.c210 if (!IS_GEN9_LP(i915) && GRAPHICS_VER(i915) < 11) in needs_wc_ggtt_mapping()
/drivers/gpu/drm/i915/
A Di915_drv.h560 #define IS_GEN9_LP(i915) (IS_BROXTON(i915) || IS_GEMINILAKE(i915)) macro
561 #define IS_GEN9_BC(i915) (GRAPHICS_VER(i915) == 9 && !IS_GEN9_LP(i915))
/drivers/gpu/drm/i915/gt/uc/
A Dintel_guc_fw.c36 if (IS_GEN9_LP(uncore->i915)) in guc_prepare_xfer()

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