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Searched refs:MAX_CHANNELS (Results 1 – 25 of 26) sorted by relevance

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/drivers/iio/light/
A Dhid-sensor-prox.c22 #define MAX_CHANNELS ARRAY_SIZE(prox_usage_ids) macro
33 struct hid_sensor_hub_attribute_info prox_attr[MAX_CHANNELS];
34 struct iio_chan_spec channels[MAX_CHANNELS];
35 u32 channel2usage[MAX_CHANNELS];
36 u32 human_presence[MAX_CHANNELS];
37 int scale_pre_decml[MAX_CHANNELS];
38 int scale_post_decml[MAX_CHANNELS];
39 int scale_precision[MAX_CHANNELS];
239 for (i = 0; i < MAX_CHANNELS; i++) { in prox_parse_report()
/drivers/hwmon/
A Dtmp421.c32 #define MAX_CHANNELS 4 macro
44 static const u8 TMP421_TEMP_MSB[MAX_CHANNELS] = { 0x00, 0x01, 0x02, 0x03 };
45 static const u8 TMP421_TEMP_LSB[MAX_CHANNELS] = { 0x10, 0x11, 0x12, 0x13 };
103 u32 temp_config[MAX_CHANNELS + 1];
111 struct tmp421_channel channel[MAX_CHANNELS];
A Dlm90.c118 #define MAX_CHANNELS 3 macro
732 u32 channel_config[MAX_CHANNELS + 1];
733 const char *channel_label[MAX_CHANNELS];
1485 static const u8 lm90_temp_index[MAX_CHANNELS] = {
1489 static const u8 lm90_temp_min_index[MAX_CHANNELS] = {
1493 static const u8 lm90_temp_max_index[MAX_CHANNELS] = {
1497 static const u8 lm90_temp_crit_index[MAX_CHANNELS] = {
1501 static const u8 lm90_temp_emerg_index[MAX_CHANNELS] = {
1505 static const s8 lm90_temp_offset_index[MAX_CHANNELS] = {
1514 static const u16 lm90_fault_bits[MAX_CHANNELS] = { BIT(0), BIT(2), BIT(10) };
[all …]
A Dtmp464.c27 #define MAX_CHANNELS 9 macro
33 static const u8 TMP464_THERM_LIMIT[MAX_CHANNELS] = {
35 static const u8 TMP464_THERM2_LIMIT[MAX_CHANNELS] = {
102 struct tmp464_channel channel[MAX_CHANNELS];
/drivers/media/usb/s2255/
A Ds2255drv.c69 #define MAX_CHANNELS 4 macro
248 struct s2255_vc vc[MAX_CHANNELS];
1595 for (i = 0; i < MAX_CHANNELS; i++) { in s2255_probe_v4l()
1720 if (cc >= MAX_CHANNELS) { in save_frame()
1744 if (cc >= MAX_CHANNELS) in save_frame()
1852 if (dev->cc >= MAX_CHANNELS) { in s2255_read_video_callback()
1993 for (j = 0; j < MAX_CHANNELS; j++) { in s2255_board_init()
2020 for (i = 0; i < MAX_CHANNELS; i++) { in s2255_board_shutdown()
2025 for (i = 0; i < MAX_CHANNELS; i++) in s2255_board_shutdown()
2257 for (i = 0; i < MAX_CHANNELS; i++) { in s2255_probe()
[all …]
/drivers/edac/
A Di7300_edac.c65 #define MAX_CHANNELS (MAX_CH_PER_BRANCH * MAX_BRANCHES) macro
107 u16 ambpresent[MAX_CHANNELS]; /* AMB present regs */
110 struct i7300_dimm_info dimm_info[MAX_SLOTS][MAX_CHANNELS];
697 for (channel = 0; channel < MAX_CHANNELS; channel++) { in print_dimm_size()
718 for (channel = 0; channel < MAX_CHANNELS; channel++) { in print_dimm_size()
A Di5400_edac.c55 #define MAX_CHANNELS (MAX_BRANCHES * CHANNELS_PER_BRANCH) macro
351 struct i5400_dimm_info dimm_info[DIMMS_PER_CHANNEL][MAX_CHANNELS];
1295 pvt->maxch = MAX_CHANNELS; in i5400_probe1()
A Di5000_edac.c319 #define MAX_CHANNELS 6 /* max possible channels */ macro
350 struct i5000_dimm_info dimm_info[MAX_CSROWS][MAX_CHANNELS];
/drivers/scsi/
A Da100u2w.h73 #define MAX_CHANNELS 2 macro
242 u32 allocation_map[MAX_CHANNELS][8]; /* Max STB is 256, So 256/32 */
A Dmegaraid.h81 #define MAX_CHANNELS 5 macro
83 #define MAX_PHYSICAL_DRIVES MAX_CHANNELS*MAX_TARGET
389 u16 phys_drv_format[MAX_CHANNELS];
860 u8 logdrv_chan[MAX_CHANNELS+NVIRT_CHAN]; /* logical drive are on
A Da100u2w.c483 for (i = 0; i < MAX_CHANNELS; i++) { in init_alloc_map()
A Dmegaraid.c4359 for (i = NVIRT_CHAN; i < MAX_CHANNELS+NVIRT_CHAN; i++) in megaraid_probe_one()
/drivers/hwmon/pmbus/
A Disl68137.c24 #define MAX_CHANNELS 4 macro
84 struct isl68137_channel channel[MAX_CHANNELS];
367 for (i = 0; i < MAX_CHANNELS; i++) in isl68137_probe()
/drivers/gpu/drm/radeon/
A Ddce3_1_afmt.c98 value = MAX_CHANNELS(sad->channels) | in dce3_2_afmt_write_sad_regs()
A Ddce6_afmt.c240 value = MAX_CHANNELS(sad->channels) | in dce6_afmt_write_sad_regs()
A Devergreen_hdmi.c188 value = MAX_CHANNELS(sad->channels) | in evergreen_hdmi_write_sad_regs()
A Drv770d.h886 # define MAX_CHANNELS(x) (((x) & 0x7) << 0) macro
A Dsid.h722 # define MAX_CHANNELS(x) (((x) & 0x7) << 0) macro
A Devergreend.h749 # define MAX_CHANNELS(x) (((x) & 0x7) << 0) macro
A Dr600d.h1006 # define MAX_CHANNELS(x) (((x) & 0x7) << 0) macro
/drivers/most/
A Dcore.c25 #define MAX_CHANNELS 64 macro
70 struct most_channel *channel[MAX_CHANNELS];
1286 !iface->poison_channel || (iface->num_channels > MAX_CHANNELS)) in most_register_interface()
/drivers/usb/host/
A Docteon-hcd.c221 #define MAX_CHANNELS 8 macro
343 } entry[MAX_CHANNELS + 1];
372 struct cvmx_usb_pipe *pipe_for_channel[MAX_CHANNELS];
1221 if (fifo->tail > MAX_CHANNELS) in cvmx_usb_fill_tx_hw()
1334 if (fifo->head > MAX_CHANNELS) in cvmx_usb_fill_tx_fifo()
/drivers/net/wan/
A Dixp4xx_hss.c56 #define MAX_CHANNELS (FRAME_SIZE / 8) macro
384 for (ch = 0; ch < MAX_CHANNELS; ch++) { in hss_config_set_lut()
/drivers/gpu/drm/amd/display/dc/dce/
A Ddce_audio.c834 MAX_CHANNELS); in dce_aud_az_configure()
/drivers/gpu/drm/amd/amdgpu/
A Ddce_v10_0.c1391 MAX_CHANNELS, sad->channels); in dce_v10_0_audio_write_sad_regs()

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