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Searched refs:MAX_CONTROLLER_NUM (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/amd/display/include/
A Dlink_service_types.h260 struct dc_dp_mst_stream_allocation stream_allocations[MAX_CONTROLLER_NUM];
/drivers/gpu/drm/amd/display/dc/
A Ddc_types.h1013 #define MAX_CONTROLLER_NUM 6 macro
1020 struct link_mst_stream_allocation stream_allocations[MAX_CONTROLLER_NUM];
/drivers/gpu/drm/amd/display/dc/link/
A Dlink_dpms.c1256 struct link_mst_stream_allocation work_table[MAX_CONTROLLER_NUM] = { 0 }; in update_mst_stream_alloc_table()
1296 for (i = 0; i < MAX_CONTROLLER_NUM; i++) in update_mst_stream_alloc_table()
1389 for (i = 0; i < MAX_CONTROLLER_NUM; i++) { in deallocate_mst_payload()
1469 for (i = 0; i < MAX_CONTROLLER_NUM; i++) { in allocate_mst_payload()
1792 for (i = 0; i < MAX_CONTROLLER_NUM; i++) { in link_reduce_mst_payload()
1859 for (i = 0; i < MAX_CONTROLLER_NUM; i++) { in link_increase_mst_payload()
/drivers/gpu/drm/amd/display/amdgpu_dm/
A Damdgpu_dm_helpers.c209 for (i = 0; i < MAX_CONTROLLER_NUM; i++) { in fill_dc_mst_payload_table_from_drm()

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