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Searched refs:MC_SEQ_CAS_TIMING_LP (Results 1 – 12 of 12) sorted by relevance

/drivers/gpu/drm/radeon/
A Dbtcd.h148 #define MC_SEQ_CAS_TIMING_LP 0x2a70 macro
A Dbtc_dpm.c1834 *out_reg = MC_SEQ_CAS_TIMING_LP >> 2; in btc_check_s0_mc_reg_index()
2001 WREG32(MC_SEQ_CAS_TIMING_LP, RREG32(MC_SEQ_CAS_TIMING)); in btc_initialize_mc_reg_table()
A Dnid.h806 #define MC_SEQ_CAS_TIMING_LP 0x2a70 macro
A Dsid.h574 #define MC_SEQ_CAS_TIMING_LP 0x2a70 macro
A Dcikd.h699 #define MC_SEQ_CAS_TIMING_LP 0x2a70 macro
A Devergreend.h324 #define MC_SEQ_CAS_TIMING_LP 0x2a70 macro
A Dni_dpm.c2780 *out_reg = MC_SEQ_CAS_TIMING_LP >> 2; in ni_check_s0_mc_reg_index()
2887 WREG32(MC_SEQ_CAS_TIMING_LP, RREG32(MC_SEQ_CAS_TIMING)); in ni_initialize_mc_reg_table()
A Dcypress_dpm.c978 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_CAS_TIMING_LP >> 2; in cypress_set_mc_reg_address_table()
A Dsi_dpm.c5371 *out_reg = MC_SEQ_CAS_TIMING_LP >> 2; in si_check_s0_mc_reg_index()
5482 WREG32(MC_SEQ_CAS_TIMING_LP, RREG32(MC_SEQ_CAS_TIMING)); in si_initialize_mc_reg_table()
A Dci_dpm.c4376 *out_reg = MC_SEQ_CAS_TIMING_LP >> 2; in ci_check_s0_mc_reg_index()
4585 WREG32(MC_SEQ_CAS_TIMING_LP, RREG32(MC_SEQ_CAS_TIMING)); in ci_initialize_mc_reg_table()
/drivers/gpu/drm/amd/amdgpu/
A Dsid.h177 #define MC_SEQ_CAS_TIMING_LP 0xA9C macro
/drivers/gpu/drm/amd/pm/legacy-dpm/
A Dsi_dpm.c5928 *out_reg = MC_SEQ_CAS_TIMING_LP; in si_check_s0_mc_reg_index()
6039 WREG32(MC_SEQ_CAS_TIMING_LP, RREG32(MC_SEQ_CAS_TIMING)); in si_initialize_mc_reg_table()

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