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Searched refs:MMNPU_APERTURE0_BASE (Results 1 – 4 of 4) sorted by relevance

/drivers/accel/amdxdna/
A Dnpu2_regs.c46 #define MMNPU_APERTURE0_BASE 0x3000000 macro
58 #define NPU2_REG_BAR_BASE MMNPU_APERTURE0_BASE
59 #define NPU2_MBOX_BAR_BASE MMNPU_APERTURE0_BASE
A Dnpu5_regs.c46 #define MMNPU_APERTURE0_BASE 0x3000000 macro
58 #define NPU5_REG_BAR_BASE MMNPU_APERTURE0_BASE
59 #define NPU5_MBOX_BAR_BASE MMNPU_APERTURE0_BASE
A Dnpu6_regs.c46 #define MMNPU_APERTURE0_BASE 0x3000000 macro
58 #define NPU6_REG_BAR_BASE MMNPU_APERTURE0_BASE
59 #define NPU6_MBOX_BAR_BASE MMNPU_APERTURE0_BASE
A Dnpu4_regs.c46 #define MMNPU_APERTURE0_BASE 0x3000000 macro
58 #define NPU4_REG_BAR_BASE MMNPU_APERTURE0_BASE
59 #define NPU4_MBOX_BAR_BASE MMNPU_APERTURE0_BASE

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