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Searched refs:MMNPU_APERTURE1_BASE (Results 1 – 4 of 4) sorted by relevance

/drivers/accel/amdxdna/
A Dnpu2_regs.c47 #define MMNPU_APERTURE1_BASE 0x3600000 macro
62 #define NPU2_SRAM_BAR_BASE MMNPU_APERTURE1_BASE
A Dnpu5_regs.c47 #define MMNPU_APERTURE1_BASE 0x3600000 macro
62 #define NPU5_SRAM_BAR_BASE MMNPU_APERTURE1_BASE
A Dnpu6_regs.c47 #define MMNPU_APERTURE1_BASE 0x3600000 macro
62 #define NPU6_SRAM_BAR_BASE MMNPU_APERTURE1_BASE
A Dnpu4_regs.c47 #define MMNPU_APERTURE1_BASE 0x3600000 macro
62 #define NPU4_SRAM_BAR_BASE MMNPU_APERTURE1_BASE

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