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Searched refs:MMNPU_APERTURE4_BASE (Results 1 – 4 of 4) sorted by relevance

/drivers/accel/amdxdna/
A Dnpu2_regs.c49 #define MMNPU_APERTURE4_BASE 0x3B10000 macro
61 #define NPU2_SMU_BAR_BASE MMNPU_APERTURE4_BASE
90 DEFINE_BAR_OFFSET(SMU_INTR_REG, NPU2_SMU, MMNPU_APERTURE4_BASE),
A Dnpu5_regs.c49 #define MMNPU_APERTURE4_BASE 0x3B10000 macro
61 #define NPU5_SMU_BAR_BASE MMNPU_APERTURE4_BASE
90 DEFINE_BAR_OFFSET(SMU_INTR_REG, NPU5_SMU, MMNPU_APERTURE4_BASE),
A Dnpu6_regs.c49 #define MMNPU_APERTURE4_BASE 0x3B10000 macro
61 #define NPU6_SMU_BAR_BASE MMNPU_APERTURE4_BASE
90 DEFINE_BAR_OFFSET(SMU_INTR_REG, NPU6_SMU, MMNPU_APERTURE4_BASE),
A Dnpu4_regs.c49 #define MMNPU_APERTURE4_BASE 0x3B10000 macro
61 #define NPU4_SMU_BAR_BASE MMNPU_APERTURE4_BASE
111 DEFINE_BAR_OFFSET(SMU_INTR_REG, NPU4_SMU, MMNPU_APERTURE4_BASE),

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