Searched refs:MMSCH_V5_0_INSERT_DIRECT_WT (Results 1 – 3 of 3) sorted by relevance
| /drivers/gpu/drm/amd/amdgpu/ |
| A D | vcn_v5_0_1.c | 788 MMSCH_V5_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v5_0_1_start_sriov()
793 MMSCH_V5_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v5_0_1_start_sriov()
795 MMSCH_V5_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v5_0_1_start_sriov()
797 MMSCH_V5_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v5_0_1_start_sriov()
799 MMSCH_V5_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v5_0_1_start_sriov()
805 MMSCH_V5_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v5_0_1_start_sriov()
808 MMSCH_V5_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v5_0_1_start_sriov()
811 MMSCH_V5_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v5_0_1_start_sriov()
814 MMSCH_V5_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v5_0_1_start_sriov()
830 MMSCH_V5_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v5_0_1_start_sriov()
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| A D | mmsch_v5_0.h | 114 #define MMSCH_V5_0_INSERT_DIRECT_WT(reg, value) { \ macro
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| A D | jpeg_v5_0_1.c | 482 MMSCH_V5_0_INSERT_DIRECT_WT(tmp, lower_32_bits(ring->gpu_addr)); in jpeg_v5_0_1_start_sriov()
484 MMSCH_V5_0_INSERT_DIRECT_WT(tmp, upper_32_bits(ring->gpu_addr)); in jpeg_v5_0_1_start_sriov()
486 MMSCH_V5_0_INSERT_DIRECT_WT(tmp, ring->ring_size / 4); in jpeg_v5_0_1_start_sriov()
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