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Searched refs:MP0_C2PMSG_73 (Results 1 – 4 of 4) sorted by relevance

/drivers/accel/amdxdna/
A Dnpu2_regs.c34 #define MP0_C2PMSG_73 0x3810A24 macro
83 DEFINE_BAR_OFFSET(PSP_INTR_REG, NPU2_PSP, MP0_C2PMSG_73),
A Dnpu5_regs.c34 #define MP0_C2PMSG_73 0x3810A24 macro
83 DEFINE_BAR_OFFSET(PSP_INTR_REG, NPU5_PSP, MP0_C2PMSG_73),
A Dnpu6_regs.c34 #define MP0_C2PMSG_73 0x3810A24 macro
83 DEFINE_BAR_OFFSET(PSP_INTR_REG, NPU6_PSP, MP0_C2PMSG_73),
A Dnpu4_regs.c34 #define MP0_C2PMSG_73 0x3810A24 macro
104 DEFINE_BAR_OFFSET(PSP_INTR_REG, NPU4_PSP, MP0_C2PMSG_73),

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