Searched refs:MP1_C2PMSG_0 (Results 1 – 4 of 4) sorted by relevance
| /drivers/accel/amdxdna/ |
| A D | npu2_regs.c | 37 #define MP1_C2PMSG_0 0x3B10900 macro
88 DEFINE_BAR_OFFSET(SMU_CMD_REG, NPU2_SMU, MP1_C2PMSG_0),
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| A D | npu5_regs.c | 37 #define MP1_C2PMSG_0 0x3B10900 macro
88 DEFINE_BAR_OFFSET(SMU_CMD_REG, NPU5_SMU, MP1_C2PMSG_0),
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| A D | npu6_regs.c | 37 #define MP1_C2PMSG_0 0x3B10900 macro
88 DEFINE_BAR_OFFSET(SMU_CMD_REG, NPU6_SMU, MP1_C2PMSG_0),
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| A D | npu4_regs.c | 37 #define MP1_C2PMSG_0 0x3B10900 macro
109 DEFINE_BAR_OFFSET(SMU_CMD_REG, NPU4_SMU, MP1_C2PMSG_0),
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