Searched refs:MP1_C2PMSG_61 (Results 1 – 4 of 4) sorted by relevance
| /drivers/accel/amdxdna/ |
| A D | npu2_regs.c | 39 #define MP1_C2PMSG_61 0x3B109F4 macro
91 DEFINE_BAR_OFFSET(SMU_RESP_REG, NPU2_SMU, MP1_C2PMSG_61),
|
| A D | npu5_regs.c | 39 #define MP1_C2PMSG_61 0x3B109F4 macro
91 DEFINE_BAR_OFFSET(SMU_RESP_REG, NPU5_SMU, MP1_C2PMSG_61),
|
| A D | npu6_regs.c | 39 #define MP1_C2PMSG_61 0x3B109F4 macro
91 DEFINE_BAR_OFFSET(SMU_RESP_REG, NPU6_SMU, MP1_C2PMSG_61),
|
| A D | npu4_regs.c | 39 #define MP1_C2PMSG_61 0x3B109F4 macro
112 DEFINE_BAR_OFFSET(SMU_RESP_REG, NPU4_SMU, MP1_C2PMSG_61),
|
Completed in 7 milliseconds