Searched refs:MPLL_FUNC_CNTL_1 (Results 1 – 9 of 9) sorted by relevance
| /drivers/gpu/drm/amd/amdgpu/ |
| A D | sid.h | 218 #define MPLL_FUNC_CNTL_1 0xAEE macro
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| /drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
| A D | iceland_smumgr.c | 1077 MPLL_FUNC_CNTL_1, CLKF, mpll_param.mpll_fb_divider.cl_kf); in iceland_calculate_mclk_params()
1079 MPLL_FUNC_CNTL_1, CLKFRAC, mpll_param.mpll_fb_divider.clk_frac); in iceland_calculate_mclk_params()
1081 MPLL_FUNC_CNTL_1, VCO_MODE, mpll_param.vco_mode); in iceland_calculate_mclk_params()
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| A D | ci_smumgr.c | 1053 MPLL_FUNC_CNTL_1, CLKF, mpll_param.mpll_fb_divider.cl_kf); in ci_calculate_mclk_params()
1055 MPLL_FUNC_CNTL_1, CLKFRAC, mpll_param.mpll_fb_divider.clk_frac); in ci_calculate_mclk_params()
1057 MPLL_FUNC_CNTL_1, VCO_MODE, mpll_param.vco_mode); in ci_calculate_mclk_params()
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| A D | tonga_smumgr.c | 823 MPLL_FUNC_CNTL_1, CLKF, in tonga_calculate_mclk_params()
826 MPLL_FUNC_CNTL_1, CLKFRAC, in tonga_calculate_mclk_params()
829 MPLL_FUNC_CNTL_1, VCO_MODE, in tonga_calculate_mclk_params()
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| /drivers/gpu/drm/radeon/ |
| A D | sid.h | 615 #define MPLL_FUNC_CNTL_1 0x2bb8 macro
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| A D | cikd.h | 738 #define MPLL_FUNC_CNTL_1 0x2bb8 macro
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| A D | si_dpm.c | 3519 si_pi->clock_registers.mpll_func_cntl_1 = RREG32(MPLL_FUNC_CNTL_1); in si_read_clock_registers()
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| A D | ci_dpm.c | 1849 pi->clock_registers.mpll_func_cntl_1 = RREG32(MPLL_FUNC_CNTL_1); in ci_read_clock_registers()
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| /drivers/gpu/drm/amd/pm/legacy-dpm/ |
| A D | si_dpm.c | 4056 si_pi->clock_registers.mpll_func_cntl_1 = RREG32(MPLL_FUNC_CNTL_1); in si_read_clock_registers()
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