Searched refs:M_MASK (Results 1 – 5 of 5) sorted by relevance
| /drivers/phy/freescale/ |
| A D | phy-fsl-imx8qm-lvds-phy.c | 22 #define M_MASK GENMASK(18, 17) macro
23 #define M(n) FIELD_PREP(M_MASK, (n))
39 #define CTRL_INIT_MASK (M_MASK | CCM_MASK | CA_MASK | TST_MASK | NB | RFB)
117 regmap_update_bits(priv->regmap, PHY_CTRL, M_MASK | NB, val); in mixel_lvds_phy_power_on()
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| /drivers/phy/rockchip/ |
| A D | phy-rockchip-samsung-dcphy.c | 141 #define M_MASK GENMASK(9, 0) macro
142 #define M(x) FIELD_PREP(M_MASK, x)
1076 M_MASK, M(samsung->pll.fbdiv)); in samsung_mipi_dcphy_pll_configure()
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| /drivers/gpu/drm/bridge/imx/ |
| A D | imx93-mipi-dsi.c | 41 #define M_MASK GENMASK(9, 0) macro
42 #define M(x) FIELD_PREP(M_MASK, ((x) - 2))
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| /drivers/atm/ |
| A D | iphase.c | 315 #define M_MASK 0x1ff in cellrate_to_float() macro
327 flot = NZ | (i << M_BITS) | (cr & M_MASK); in cellrate_to_float()
329 flot = NZ | (i << M_BITS) | ((cr << (M_BITS - i)) & M_MASK); in cellrate_to_float()
331 flot = NZ | (i << M_BITS) | ((cr >> (i - M_BITS)) & M_MASK); in cellrate_to_float()
346 mantissa = rate & M_MASK;
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| /drivers/iommu/ |
| A D | msm_iommu_hw-8xxx.h | 1123 #define M (M_MASK << M_SHIFT)
1585 #define M_MASK 0x01 macro
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