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Searched refs:NVDEF (Results 1 – 25 of 51) sorted by relevance

123

/drivers/gpu/drm/nouveau/dispnv50/
A Dcoreca7d.c33 NVDEF(NVCA7D, SET_SURFACE_ADDRESS_LO_NOTIFIER, TARGET, PHYSICAL_NVM) | in coreca7d_update()
34 NVDEF(NVCA7D, SET_SURFACE_ADDRESS_LO_NOTIFIER, ENABLE, ENABLE)); in coreca7d_update()
37 NVDEF(NVCA7D, SET_NOTIFIER_CONTROL, MODE, WRITE) | in coreca7d_update()
38 NVDEF(NVCA7D, SET_NOTIFIER_CONTROL, NOTIFY, ENABLE)); in coreca7d_update()
45 NVDEF(NVCA7D, UPDATE, RELEASE_ELV, TRUE) | in coreca7d_update()
46 NVDEF(NVCA7D, UPDATE, SPECIAL_HANDLING, NONE) | in coreca7d_update()
47 NVDEF(NVCA7D, UPDATE, INHIBIT_INTERRUPTS, FALSE)); in coreca7d_update()
51 NVDEF(NVCA7D, SET_NOTIFIER_CONTROL, NOTIFY, DISABLE)); in coreca7d_update()
79 NVDEF(NVCA7D, WINDOW_SET_WINDOW_USAGE_BOUNDS, ILUT_ALLOWED, TRUE) | in coreca7d_init()
88 NVDEF(NVCA7D, HEAD_SET_HEAD_USAGE_BOUNDS, CURSOR, USAGE_W256_H256) | in coreca7d_init()
[all …]
A Dcorec37d.c45 NVDEF(NVC37D, WINDOW_SET_CONTROL, OWNER, HEAD(i >> 1))); in corec37d_wndw_owner()
62 NVDEF(NVC37D, SET_NOTIFIER_CONTROL, MODE, WRITE) | in corec37d_update()
64 NVDEF(NVC37D, SET_NOTIFIER_CONTROL, NOTIFY, ENABLE)); in corec37d_update()
70 NVDEF(NVC37D, UPDATE, SPECIAL_HANDLING, NONE) | in corec37d_update()
71 NVDEF(NVC37D, UPDATE, INHIBIT_INTERRUPTS, FALSE)); in corec37d_update()
75 NVDEF(NVC37D, SET_NOTIFIER_CONTROL, NOTIFY, DISABLE)); in corec37d_update()
97 NVDEF(NV_DISP_NOTIFIER, _0, STATUS, NOT_BEGUN)); in corec37d_ntfy_init()
145 NVDEF(NVC37D, WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS, YUV_PACKED422, TRUE), in corec37d_init()
151 NVDEF(NVC37D, WINDOW_SET_WINDOW_USAGE_BOUNDS, INPUT_LUT, USAGE_1025) | in corec37d_init()
152 NVDEF(NVC37D, WINDOW_SET_WINDOW_USAGE_BOUNDS, INPUT_SCALER_TAPS, TAPS_2) | in corec37d_init()
[all …]
A Dhead907d.c68 NVDEF(NV907D, HEAD_SET_PROCAMP, COLOR_SPACE, RGB) | in head907d_procamp()
69 NVDEF(NV907D, HEAD_SET_PROCAMP, CHROMA_LPF, AUTO) | in head907d_procamp()
72 NVDEF(NV907D, HEAD_SET_PROCAMP, DYNAMIC_RANGE, VESA) | in head907d_procamp()
163 NVDEF(NV907D, HEAD_SET_CONTROL_CURSOR, ENABLE, DISABLE) | in head907d_curs_clr()
164 NVDEF(NV907D, HEAD_SET_CONTROL_CURSOR, FORMAT, A8R8G8B8) | in head907d_curs_clr()
165 NVDEF(NV907D, HEAD_SET_CONTROL_CURSOR, SIZE, W64_H64)); in head907d_curs_clr()
182 NVDEF(NV907D, HEAD_SET_CONTROL_CURSOR, ENABLE, ENABLE) | in head907d_curs_set()
234 NVDEF(NV907D, HEAD_SET_PARAMS, SUPER_SAMPLE, X1_AA) | in head907d_core_set()
235 NVDEF(NV907D, HEAD_SET_PARAMS, GAMMA, LINEAR), in head907d_core_set()
257 NVDEF(NV907D, HEAD_SET_OUTPUT_LUT_LO, ENABLE, DISABLE)); in head907d_olut_clr()
[all …]
A Dcrc907d.c32 NVDEF(NV907D, HEAD_SET_CRC_CONTROL, EXPECT_BUFFER_COLLAPSE, FALSE) | in crc907d_set_src()
33 NVDEF(NV907D, HEAD_SET_CRC_CONTROL, TIMESTAMP_MODE, FALSE) | in crc907d_set_src()
34 NVDEF(NV907D, HEAD_SET_CRC_CONTROL, SECONDARY_OUTPUT, NONE) | in crc907d_set_src()
35 NVDEF(NV907D, HEAD_SET_CRC_CONTROL, CRC_DURING_SNOOZE, DISABLE) | in crc907d_set_src()
36 NVDEF(NV907D, HEAD_SET_CRC_CONTROL, WIDE_PIPE_CRC, ENABLE); in crc907d_set_src()
41 crc_args |= NVDEF(NV907D, HEAD_SET_CRC_CONTROL, PRIMARY_OUTPUT, SOR(or)); in crc907d_set_src()
44 crc_args |= NVDEF(NV907D, HEAD_SET_CRC_CONTROL, PRIMARY_OUTPUT, PIOR(or)); in crc907d_set_src()
47 crc_args |= NVDEF(NV907D, HEAD_SET_CRC_CONTROL, PRIMARY_OUTPUT, DAC(or)); in crc907d_set_src()
50 crc_args |= NVDEF(NV907D, HEAD_SET_CRC_CONTROL, PRIMARY_OUTPUT, RG(i)); in crc907d_set_src()
53 crc_args |= NVDEF(NV907D, HEAD_SET_CRC_CONTROL, PRIMARY_OUTPUT, SF(i)); in crc907d_set_src()
[all …]
A Dheadca7d.c82 NVDEF(NVCA7D, HEAD_SET_PROCAMP, COLOR_SPACE, RGB) | in headca7d_procamp()
83 NVDEF(NVCA7D, HEAD_SET_PROCAMP, CHROMA_LPF, DISABLE) | in headca7d_procamp()
84 NVDEF(NVCA7D, HEAD_SET_PROCAMP, DYNAMIC_RANGE, VESA)); in headca7d_procamp()
103 NVDEF(NVCA7D, HEAD_SET_DITHER_CONTROL, OFFSET_ENABLE, DISABLE) | in headca7d_dither()
122 NVDEF(NVCA7D, HEAD_SET_CONTROL_CURSOR, ENABLE, DISABLE) | in headca7d_curs_clr()
123 NVDEF(NVCA7D, HEAD_SET_CONTROL_CURSOR, FORMAT, A8R8G8B8)); in headca7d_curs_clr()
152 NVDEF(NVCA7D, HEAD_SET_CONTROL_CURSOR, ENABLE, ENABLE) | in headca7d_curs_set()
164 NVDEF(NVCA7D, HEAD_SET_CONTROL_CURSOR_COMPOSITION, MODE, BLEND)); in headca7d_curs_set()
204 NVDEF(NVCA7D, HEAD_SET_SURFACE_ADDRESS_LO_OLUT, ENABLE, ENABLE)); in headca7d_olut_set()
208 NVDEF(NVCA7D, HEAD_SET_OLUT_CONTROL, MIRROR, DISABLE) | in headca7d_olut_set()
[all …]
A Dhead507d.c40 NVDEF(NV507D, HEAD_SET_PROCAMP, COLOR_SPACE, RGB) | in head507d_procamp()
41 NVDEF(NV507D, HEAD_SET_PROCAMP, CHROMA_LPF, AUTO) | in head507d_procamp()
44 NVDEF(NV507D, HEAD_SET_PROCAMP, TRANSITION, HARD)); in head507d_procamp()
133 NVDEF(NV507D, HEAD_SET_CONTROL_CURSOR, ENABLE, DISABLE) | in head507d_curs_clr()
135 NVDEF(NV507D, HEAD_SET_CONTROL_CURSOR, SIZE, W64_H64)); in head507d_curs_clr()
150 NVDEF(NV507D, HEAD_SET_CONTROL_CURSOR, ENABLE, ENABLE) | in head507d_curs_set()
156 NVDEF(NV507D, HEAD_SET_CONTROL_CURSOR, SUB_OWNER, NONE), in head507d_curs_set()
289 NVDEF(NV507D, HEAD_SET_BASE_LUT_LO, ENABLE, DISABLE)); in head507d_olut_clr()
304 NVDEF(NV507D, HEAD_SET_BASE_LUT_LO, ENABLE, ENABLE) | in head507d_olut_set()
358 NVDEF(NV507D, HEAD_SET_PIXEL_CLOCK, MODE, CLK_CUSTOM) | in head507d_mode()
[all …]
A Dcore507d.c44 NVDEF(NV507D, SET_NOTIFIER_CONTROL, MODE, WRITE) | in core507d_update()
46 NVDEF(NV507D, SET_NOTIFIER_CONTROL, NOTIFY, ENABLE)); in core507d_update()
51 NVDEF(NV507D, UPDATE, NOT_DRIVER_FRIENDLY, FALSE) | in core507d_update()
52 NVDEF(NV507D, UPDATE, NOT_DRIVER_UNFRIENDLY, FALSE) | in core507d_update()
53 NVDEF(NV507D, UPDATE, INHIBIT_INTERRUPTS, FALSE), in core507d_update()
56 NVDEF(NV507D, SET_NOTIFIER_CONTROL, NOTIFY, DISABLE)); in core507d_update()
77 NVDEF(NV_DISP_CORE_NOTIFIER_1, COMPLETION_0, DONE, FALSE)); in core507d_ntfy_init()
91 NVDEF(NV507D, SET_NOTIFIER_CONTROL, MODE, WRITE) | in core507d_read_caps()
93 NVDEF(NV507D, SET_NOTIFIER_CONTROL, NOTIFY, ENABLE)); in core507d_read_caps()
98 NVDEF(NV507D, SET_NOTIFIER_CONTROL, NOTIFY, DISABLE)); in core507d_read_caps()
[all …]
A Dwndwca7e.c26 NVDEF(NVCA7E, SET_PRESENT_CONTROL, BEGIN_MODE, NON_TEARING)); in wndwca7e_image_clr()
29 NVDEF(NVCA7E, SET_SURFACE_ADDRESS_LO_ISO, ENABLE, DISABLE)); in wndwca7e_image_clr()
55 NVDEF(NVCA7E, SET_SURFACE_ADDRESS_LO_ISO, TARGET, PHYSICAL_NVM) | in wndwca7e_image_set()
57 NVDEF(NVCA7E, SET_SURFACE_ADDRESS_LO_ISO, ENABLE, ENABLE)); in wndwca7e_image_set()
62 NVDEF(NVCA7E, SET_PRESENT_CONTROL, TIMESTAMP_MODE, DISABLE)); in wndwca7e_image_set()
73 NVDEF(NVCA7E, SET_PARAMS, CLAMP_BEFORE_BLEND, DISABLE) | in wndwca7e_image_set()
74 NVDEF(NVCA7E, SET_PARAMS, SWAP_UV, DISABLE) | in wndwca7e_image_set()
75 NVDEF(NVCA7E, SET_PARAMS, FMT_ROUNDING_MODE, ROUND_TO_NEAREST), in wndwca7e_image_set()
107 NVDEF(NVCA7E, SET_SURFACE_ADDRESS_LO_ILUT, ENABLE, DISABLE)); in wndwca7e_ilut_clr()
129 NVDEF(NVCA7E, SET_SURFACE_ADDRESS_LO_ILUT, ENABLE, ENABLE)); in wndwca7e_ilut_set()
[all …]
A Dheadc37d.c75 NVDEF(NVC37D, HEAD_SET_PROCAMP, COLOR_SPACE, RGB) | in headc37d_procamp()
76 NVDEF(NVC37D, HEAD_SET_PROCAMP, CHROMA_LPF, DISABLE) | in headc37d_procamp()
79 NVDEF(NVC37D, HEAD_SET_PROCAMP, DYNAMIC_RANGE, VESA) | in headc37d_procamp()
80 NVDEF(NVC37D, HEAD_SET_PROCAMP, RANGE_COMPRESSION, DISABLE) | in headc37d_procamp()
81 NVDEF(NVC37D, HEAD_SET_PROCAMP, BLACK_LEVEL, GRAPHICS)); in headc37d_procamp()
98 NVDEF(NVC37D, HEAD_SET_DITHER_CONTROL, OFFSET_ENABLE, DISABLE) | in headc37d_dither()
115 NVDEF(NVC37D, HEAD_SET_CONTROL_CURSOR, ENABLE, DISABLE) | in headc37d_curs_clr()
116 NVDEF(NVC37D, HEAD_SET_CONTROL_CURSOR, FORMAT, A8R8G8B8)); in headc37d_curs_clr()
133 NVDEF(NVC37D, HEAD_SET_CONTROL_CURSOR, ENABLE, ENABLE) | in headc37d_curs_set()
138 NVDEF(NVC37D, HEAD_SET_CONTROL_CURSOR, DE_GAMMA, NONE), in headc37d_curs_set()
[all …]
A Dcorec57d.c44 NVDEF(NVC57D, WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS, RGB_PACKED1BPP, TRUE) | in corec57d_init()
45 NVDEF(NVC57D, WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS, RGB_PACKED2BPP, TRUE) | in corec57d_init()
46 NVDEF(NVC57D, WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS, RGB_PACKED4BPP, TRUE) | in corec57d_init()
47 NVDEF(NVC57D, WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS, RGB_PACKED8BPP, TRUE), in corec57d_init()
53 NVDEF(NVC57D, WINDOW_SET_WINDOW_USAGE_BOUNDS, ILUT_ALLOWED, TRUE) | in corec57d_init()
54 NVDEF(NVC57D, WINDOW_SET_WINDOW_USAGE_BOUNDS, INPUT_SCALER_TAPS, TAPS_2) | in corec57d_init()
55 NVDEF(NVC57D, WINDOW_SET_WINDOW_USAGE_BOUNDS, UPSCALING_ALLOWED, FALSE)); in corec57d_init()
A Dcrcca7d.c32 NVDEF(NVCA7D, HEAD_SET_SURFACE_ADDRESS_LO_CRC, TARGET, PHYSICAL_NVM) | in crcca7d_set_ctx()
33 NVDEF(NVCA7D, HEAD_SET_SURFACE_ADDRESS_LO_CRC, ENABLE, ENABLE)); in crcca7d_set_ctx()
36 NVDEF(NVCA7D, HEAD_SET_SURFACE_ADDRESS_LO_CRC, ENABLE, DISABLE)); in crcca7d_set_ctx()
80 NVDEF(NVCA7D, HEAD_SET_CRC_CONTROL, CONTROLLING_CHANNEL, CORE) | in crcca7d_set_src()
81 NVDEF(NVCA7D, HEAD_SET_CRC_CONTROL, EXPECT_BUFFER_COLLAPSE, FALSE) | in crcca7d_set_src()
83 NVDEF(NVCA7D, HEAD_SET_CRC_CONTROL, SECONDARY_CRC, NONE) | in crcca7d_set_src()
84 NVDEF(NVCA7D, HEAD_SET_CRC_CONTROL, CRC_DURING_SNOOZE, DISABLE)); in crcca7d_set_src()
A Dhead827d.c40 NVDEF(NV827D, HEAD_SET_CONTROL_CURSOR, ENABLE, DISABLE) | in head827d_curs_clr()
41 NVDEF(NV827D, HEAD_SET_CONTROL_CURSOR, FORMAT, A8R8G8B8) | in head827d_curs_clr()
42 NVDEF(NV827D, HEAD_SET_CONTROL_CURSOR, SIZE, W64_H64)); in head827d_curs_clr()
59 NVDEF(NV827D, HEAD_SET_CONTROL_CURSOR, ENABLE, ENABLE) | in head827d_curs_set()
64 NVDEF(NV827D, HEAD_SET_CONTROL_CURSOR, COMPOSITION, ALPHA_BLEND) | in head827d_curs_set()
65 NVDEF(NV827D, HEAD_SET_CONTROL_CURSOR, SUB_OWNER, NONE), in head827d_curs_set()
98 NVDEF(NV827D, HEAD_SET_PARAMS, SUPER_SAMPLE, X1_AA) | in head827d_core_set()
99 NVDEF(NV827D, HEAD_SET_PARAMS, GAMMA, LINEAR), in head827d_core_set()
121 NVDEF(NV827D, HEAD_SET_BASE_LUT_LO, ENABLE, DISABLE)); in head827d_olut_clr()
138 NVDEF(NV827D, HEAD_SET_BASE_LUT_LO, ENABLE, ENABLE) | in head827d_olut_set()
A Dcrcc57d.c18 u32 crc_args = NVDEF(NVC57D, HEAD_SET_CRC_CONTROL, CONTROLLING_CHANNEL, CORE) | in crcc57d_set_src()
19 NVDEF(NVC57D, HEAD_SET_CRC_CONTROL, EXPECT_BUFFER_COLLAPSE, FALSE) | in crcc57d_set_src()
20 NVDEF(NVC57D, HEAD_SET_CRC_CONTROL, SECONDARY_CRC, NONE) | in crcc57d_set_src()
21 NVDEF(NVC57D, HEAD_SET_CRC_CONTROL, CRC_DURING_SNOOZE, DISABLE); in crcc57d_set_src()
26 crc_args |= NVDEF(NVC57D, HEAD_SET_CRC_CONTROL, PRIMARY_CRC, SOR(or)); in crcc57d_set_src()
29 crc_args |= NVDEF(NVC57D, HEAD_SET_CRC_CONTROL, PRIMARY_CRC, SF); in crcc57d_set_src()
A Dhead917d.c58 case 8: bounds |= NVDEF(NV917D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, PIXEL_DEPTH, BPP_64); break; in head917d_base()
59 case 4: bounds |= NVDEF(NV917D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, PIXEL_DEPTH, BPP_32); break; in head917d_base()
60 case 2: bounds |= NVDEF(NV917D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, PIXEL_DEPTH, BPP_16); break; in head917d_base()
61 case 1: bounds |= NVDEF(NV917D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, PIXEL_DEPTH, BPP_8); break; in head917d_base()
66 bounds |= NVDEF(NV917D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, USABLE, TRUE); in head917d_base()
67 bounds |= NVDEF(NV917D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS, BASE_LUT, USAGE_1025); in head917d_base()
89 NVDEF(NV917D, HEAD_SET_CONTROL_CURSOR, ENABLE, ENABLE) | in head917d_curs_set()
94 NVDEF(NV917D, HEAD_SET_CONTROL_CURSOR, COMPOSITION, ALPHA_BLEND), in head917d_curs_set()
A Dbase907c.c39 NVDEF(NV907C, SET_PRESENT_CONTROL, TIMESTAMP_MODE, DISABLE) | in base907c_image_set()
59 NVDEF(NV907C, SURFACE_SET_PARAMS, SUPER_SAMPLE, X1_AA) | in base907c_image_set()
60 NVDEF(NV907C, SURFACE_SET_PARAMS, GAMMA, LINEAR) | in base907c_image_set()
61 NVDEF(NV907C, SURFACE_SET_PARAMS, LAYOUT, FRM)); in base907c_image_set()
75 NVDEF(NV907C, SET_BASE_LUT_LO, ENABLE, DISABLE)); in base907c_xlut_clr()
78 NVDEF(NV907C, SET_OUTPUT_LUT_LO, ENABLE, DISABLE)); in base907c_xlut_clr()
100 NVDEF(NV907C, SET_OUTPUT_LUT_LO, ENABLE, USE_CORE_LUT)); in base907c_xlut_set()
166 NVDEF(NV907C, SET_CSC_RED2RED, OWNER, CORE)); in base907c_csc_clr()
180 NVDEF(NV907C, SET_CSC_RED2RED, OWNER, BASE) | in base907c_csc_set()
A Dheadc57d.c73 NVDEF(NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, COLOR_SPACE_OVERRIDE, DISABLE) | in headc57d_or()
74 NVDEF(NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, EXT_PACKET_WIN, NONE)); in headc57d_or()
90 NVDEF(NVC57D, HEAD_SET_PROCAMP, COLOR_SPACE, RGB) | in headc57d_procamp()
91 NVDEF(NVC57D, HEAD_SET_PROCAMP, CHROMA_LPF, DISABLE) | in headc57d_procamp()
92 NVDEF(NVC57D, HEAD_SET_PROCAMP, DYNAMIC_RANGE, VESA)); in headc57d_procamp()
122 NVDEF(NVC57D, HEAD_SET_OLUT_CONTROL, MIRROR, DISABLE) | in headc57d_olut_set()
240 NVDEF(NVC57D, HEAD_SET_HEAD_USAGE_BOUNDS, CURSOR, USAGE_W256_H256) | in headc57d_mode()
241 NVDEF(NVC57D, HEAD_SET_HEAD_USAGE_BOUNDS, OLUT_ALLOWED, TRUE) | in headc57d_mode()
242 NVDEF(NVC57D, HEAD_SET_HEAD_USAGE_BOUNDS, OUTPUT_SCALER_TAPS, TAPS_2) | in headc57d_mode()
243 NVDEF(NVC57D, HEAD_SET_HEAD_USAGE_BOUNDS, UPSCALING_ALLOWED, TRUE)); in headc57d_mode()
/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/
A Dfifo.c39 args->flags = NVDEF(NVOS04, FLAGS, CHANNEL_TYPE, PHYSICAL); in r570_chan_alloc()
40 args->flags |= NVDEF(NVOS04, FLAGS, VPR, FALSE); in r570_chan_alloc()
44 args->flags |= NVDEF(NVOS04, FLAGS, PRIVILEGED_CHANNEL, FALSE); in r570_chan_alloc()
46 args->flags |= NVDEF(NVOS04, FLAGS, PRIVILEGED_CHANNEL, TRUE); in r570_chan_alloc()
47 args->flags |= NVDEF(NVOS04, FLAGS, DELAY_CHANNEL_SCHEDULING, FALSE); in r570_chan_alloc()
51 args->flags |= NVDEF(NVOS04, FLAGS, CHANNEL_USERD_INDEX_FIXED, FALSE); in r570_chan_alloc()
56 args->flags |= NVDEF(NVOS04, FLAGS, CHANNEL_SKIP_SCRUBBER, FALSE); in r570_chan_alloc()
57 args->flags |= NVDEF(NVOS04, FLAGS, CHANNEL_CLIENT_MAP_FIFO, FALSE); in r570_chan_alloc()
61 args->flags |= NVDEF(NVOS04, FLAGS, GROUP_CHANNEL_THREAD, DEFAULT); in r570_chan_alloc()
62 args->flags |= NVDEF(NVOS04, FLAGS, MAP_CHANNEL, FALSE); in r570_chan_alloc()
[all …]
/drivers/gpu/drm/nouveau/
A Dnouveau_boa0b5.c64 NVDEF(NVA0B5, LAUNCH_DMA, DATA_TRANSFER_TYPE, NON_PIPELINED) | in nve0_bo_move_copy()
65 NVDEF(NVA0B5, LAUNCH_DMA, FLUSH_ENABLE, TRUE) | in nve0_bo_move_copy()
66 NVDEF(NVA0B5, LAUNCH_DMA, SEMAPHORE_TYPE, NONE) | in nve0_bo_move_copy()
67 NVDEF(NVA0B5, LAUNCH_DMA, INTERRUPT_TYPE, NONE) | in nve0_bo_move_copy()
68 NVDEF(NVA0B5, LAUNCH_DMA, SRC_MEMORY_LAYOUT, PITCH) | in nve0_bo_move_copy()
69 NVDEF(NVA0B5, LAUNCH_DMA, DST_MEMORY_LAYOUT, PITCH) | in nve0_bo_move_copy()
70 NVDEF(NVA0B5, LAUNCH_DMA, MULTI_LINE_ENABLE, TRUE) | in nve0_bo_move_copy()
71 NVDEF(NVA0B5, LAUNCH_DMA, REMAP_ENABLE, FALSE) | in nve0_bo_move_copy()
72 NVDEF(NVA0B5, LAUNCH_DMA, BYPASS_L2, USE_PTE_SETTING) | in nve0_bo_move_copy()
73 NVDEF(NVA0B5, LAUNCH_DMA, SRC_TYPE, VIRTUAL) | in nve0_bo_move_copy()
[all …]
A Dnouveau_bo5039.c67 NVDEF(NV5039, SET_SRC_BLOCK_SIZE, WIDTH, ONE_GOB) | in nv50_bo_move_m2mf()
68 NVDEF(NV5039, SET_SRC_BLOCK_SIZE, HEIGHT, ONE_GOB) | in nv50_bo_move_m2mf()
69 NVDEF(NV5039, SET_SRC_BLOCK_SIZE, DEPTH, ONE_GOB), in nv50_bo_move_m2mf()
81 NVDEF(NV5039, SET_SRC_MEMORY_LAYOUT, V, PITCH)); in nv50_bo_move_m2mf()
89 NVDEF(NV5039, SET_DST_BLOCK_SIZE, WIDTH, ONE_GOB) | in nv50_bo_move_m2mf()
90 NVDEF(NV5039, SET_DST_BLOCK_SIZE, HEIGHT, ONE_GOB) | in nv50_bo_move_m2mf()
91 NVDEF(NV5039, SET_DST_BLOCK_SIZE, DEPTH, ONE_GOB), in nv50_bo_move_m2mf()
103 NVDEF(NV5039, SET_DST_MEMORY_LAYOUT, V, PITCH)); in nv50_bo_move_m2mf()
120 NVDEF(NV5039, FORMAT, IN, ONE) | in nv50_bo_move_m2mf()
121 NVDEF(NV5039, FORMAT, OUT, ONE), in nv50_bo_move_m2mf()
[all …]
A Dnouveau_dmem.c497 NVDEF(NVA0B5, LAUNCH_DMA, FLUSH_ENABLE, TRUE) | in nvc0b5_migrate_copy()
498 NVDEF(NVA0B5, LAUNCH_DMA, SEMAPHORE_TYPE, NONE) | in nvc0b5_migrate_copy()
499 NVDEF(NVA0B5, LAUNCH_DMA, INTERRUPT_TYPE, NONE) | in nvc0b5_migrate_copy()
500 NVDEF(NVA0B5, LAUNCH_DMA, SRC_MEMORY_LAYOUT, PITCH) | in nvc0b5_migrate_copy()
501 NVDEF(NVA0B5, LAUNCH_DMA, DST_MEMORY_LAYOUT, PITCH) | in nvc0b5_migrate_copy()
502 NVDEF(NVA0B5, LAUNCH_DMA, MULTI_LINE_ENABLE, TRUE) | in nvc0b5_migrate_copy()
503 NVDEF(NVA0B5, LAUNCH_DMA, REMAP_ENABLE, FALSE) | in nvc0b5_migrate_copy()
553 NVDEF(NVA0B5, LAUNCH_DMA, FLUSH_ENABLE, TRUE) | in nvc0b5_migrate_clear()
554 NVDEF(NVA0B5, LAUNCH_DMA, SEMAPHORE_TYPE, NONE) | in nvc0b5_migrate_clear()
555 NVDEF(NVA0B5, LAUNCH_DMA, INTERRUPT_TYPE, NONE) | in nvc0b5_migrate_clear()
[all …]
A Dgv100_fence.c30 NVDEF(NVC36F, SEM_EXECUTE, OPERATION, RELEASE) | in gv100_fence_emit32()
31 NVDEF(NVC36F, SEM_EXECUTE, RELEASE_WFI, EN) | in gv100_fence_emit32()
32 NVDEF(NVC36F, SEM_EXECUTE, PAYLOAD_SIZE, 32BIT) | in gv100_fence_emit32()
33 NVDEF(NVC36F, SEM_EXECUTE, RELEASE_TIMESTAMP, DIS)); in gv100_fence_emit32()
56 NVDEF(NVC36F, SEM_EXECUTE, OPERATION, ACQ_CIRC_GEQ) | in gv100_fence_sync32()
57 NVDEF(NVC36F, SEM_EXECUTE, ACQUIRE_SWITCH_TSG, EN) | in gv100_fence_sync32()
58 NVDEF(NVC36F, SEM_EXECUTE, PAYLOAD_SIZE, 32BIT)); in gv100_fence_sync32()
A Dnouveau_bo9039.c71 NVDEF(NV9039, LAUNCH_DMA, SRC_INLINE, FALSE) | in nvc0_bo_move_m2mf()
72 NVDEF(NV9039, LAUNCH_DMA, SRC_MEMORY_LAYOUT, PITCH) | in nvc0_bo_move_m2mf()
73 NVDEF(NV9039, LAUNCH_DMA, DST_MEMORY_LAYOUT, PITCH) | in nvc0_bo_move_m2mf()
74 NVDEF(NV9039, LAUNCH_DMA, COMPLETION_TYPE, FLUSH_DISABLE) | in nvc0_bo_move_m2mf()
75 NVDEF(NV9039, LAUNCH_DMA, INTERRUPT_TYPE, NONE) | in nvc0_bo_move_m2mf()
76 NVDEF(NV9039, LAUNCH_DMA, SEMAPHORE_STRUCT_SIZE, ONE_WORD)); in nvc0_bo_move_m2mf()
A Dnouveau_connector.h71 NVDEF(NV507D, HEAD_SET_DITHER_CONTROL, ENABLE, DISABLE),
73 NVDEF(NV507D, HEAD_SET_DITHER_CONTROL, ENABLE, ENABLE),
75 NVDEF(NV507D, HEAD_SET_DITHER_CONTROL, MODE, DYNAMIC_2X2),
77 NVDEF(NV507D, HEAD_SET_DITHER_CONTROL, MODE, STATIC_2X2),
79 NVDEF(NV907D, HEAD_SET_DITHER_CONTROL, MODE, TEMPORAL),
84 NVDEF(NV507D, HEAD_SET_DITHER_CONTROL, BITS, DITHER_TO_6_BITS),
86 NVDEF(NV507D, HEAD_SET_DITHER_CONTROL, BITS, DITHER_TO_8_BITS),
A Dnvc0_fence.c47 NVDEF(NV906F, SEMAPHORED, OPERATION, RELEASE) | in nvc0_fence_emit32()
48 NVDEF(NV906F, SEMAPHORED, RELEASE_WFI, EN) | in nvc0_fence_emit32()
49 NVDEF(NV906F, SEMAPHORED, RELEASE_SIZE, 16BYTE), in nvc0_fence_emit32()
70 NVDEF(NV906F, SEMAPHORED, OPERATION, ACQ_GEQ) | in nvc0_fence_sync32()
71 NVDEF(NV906F, SEMAPHORED, ACQUIRE_SWITCH, ENABLED)); in nvc0_fence_sync32()
/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/
A Dfifo.c94 args->flags = NVDEF(NVOS04, FLAGS, CHANNEL_TYPE, PHYSICAL); in r535_chan_alloc()
95 args->flags |= NVDEF(NVOS04, FLAGS, VPR, FALSE); in r535_chan_alloc()
99 args->flags |= NVDEF(NVOS04, FLAGS, PRIVILEGED_CHANNEL, FALSE); in r535_chan_alloc()
101 args->flags |= NVDEF(NVOS04, FLAGS, PRIVILEGED_CHANNEL, TRUE); in r535_chan_alloc()
102 args->flags |= NVDEF(NVOS04, FLAGS, DELAY_CHANNEL_SCHEDULING, FALSE); in r535_chan_alloc()
106 args->flags |= NVDEF(NVOS04, FLAGS, CHANNEL_USERD_INDEX_FIXED, FALSE); in r535_chan_alloc()
111 args->flags |= NVDEF(NVOS04, FLAGS, CHANNEL_SKIP_SCRUBBER, FALSE); in r535_chan_alloc()
112 args->flags |= NVDEF(NVOS04, FLAGS, CHANNEL_CLIENT_MAP_FIFO, FALSE); in r535_chan_alloc()
116 args->flags |= NVDEF(NVOS04, FLAGS, GROUP_CHANNEL_THREAD, DEFAULT); in r535_chan_alloc()
117 args->flags |= NVDEF(NVOS04, FLAGS, MAP_CHANNEL, FALSE); in r535_chan_alloc()
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