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Searched refs:NoOfDPP (Results 1 – 17 of 17) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dml/dcn30/
A Ddisplay_mode_vba_30.c3912 v->NoOfDPP[i][j][k] = 4; in dml30_ModeSupportAndSystemConfigurationFull()
3916 v->NoOfDPP[i][j][k] = 2; in dml30_ModeSupportAndSystemConfigurationFull()
3922 v->NoOfDPP[i][j][k] = 1; in dml30_ModeSupportAndSystemConfigurationFull()
3926 v->NoOfDPP[i][j][k] = 2; in dml30_ModeSupportAndSystemConfigurationFull()
3939 if (v->NoOfDPP[i][j][k] == 1) in dml30_ModeSupportAndSystemConfigurationFull()
3970 v->NoOfDPP[i][j][k] = 2; in dml30_ModeSupportAndSystemConfigurationFull()
3974 v->NoOfDPP[i][j][k] = 1; in dml30_ModeSupportAndSystemConfigurationFull()
4873 v->NoOfDPP[i][j][k] in dml30_ModeSupportAndSystemConfigurationFull()
4925 v->NoOfDPP[i][j][k] in dml30_ModeSupportAndSystemConfigurationFull()
4976 v->NoOfDPP[i][j][k] in dml30_ModeSupportAndSystemConfigurationFull()
[all …]
/drivers/gpu/drm/amd/display/dc/dml/dcn31/
A Ddisplay_mode_vba_31.c4141 v->NoOfDPP[i][j][k] = 4;
4145 v->NoOfDPP[i][j][k] = 2;
4151 v->NoOfDPP[i][j][k] = 1;
4155 v->NoOfDPP[i][j][k] = 2;
4166 v->NoOfDPP[i][j][k] = 2;
4173 if (v->NoOfDPP[i][j][k] == 1)
4211 v->NoOfDPP[i][j][k] = 2;
4216 v->NoOfDPP[i][j][k] = 1;
5212 v->NoOfDPP[i][j][k]
5267 v->NoOfDPP[i][j][k]
[all …]
/drivers/gpu/drm/amd/display/dc/dml/dcn314/
A Ddisplay_mode_vba_314.c4231 v->NoOfDPP[i][j][k] = 4;
4235 v->NoOfDPP[i][j][k] = 2;
4241 v->NoOfDPP[i][j][k] = 1;
4245 v->NoOfDPP[i][j][k] = 2;
4259 if (v->NoOfDPP[i][j][k] == 1)
4298 v->NoOfDPP[i][j][k] = 2;
4303 v->NoOfDPP[i][j][k] = 1;
5294 + v->NoOfDPP[i][j][k]
5298 v->NoOfDPP[i][j][k]
5353 v->NoOfDPP[i][j][k]
[all …]
/drivers/gpu/drm/amd/display/dc/dml/dcn20/
A Ddisplay_mode_vba_20.c3912 locals->NoOfDPP[i][j][k] = 1; in dml20_ModeSupportAndSystemConfigurationFull()
3916 locals->NoOfDPP[i][j][k] = 2; in dml20_ModeSupportAndSystemConfigurationFull()
3946 locals->NoOfDPP[i][j][NumberOfNonSplitPlaneOfMaximumBandwidth] = 2; in dml20_ModeSupportAndSystemConfigurationFull()
3959 locals->NoOfDPP[i][j][k] = 1; in dml20_ModeSupportAndSystemConfigurationFull()
3963 locals->NoOfDPP[i][j][k] = 2; in dml20_ModeSupportAndSystemConfigurationFull()
4402 locals->TotalNumberOfDCCActiveDPP[i][j] + locals->NoOfDPP[i][j][k]; in dml20_ModeSupportAndSystemConfigurationFull()
4413 locals->NoOfDPPThisState[k] = locals->NoOfDPP[i][j][k]; in dml20_ModeSupportAndSystemConfigurationFull()
4433 / mode_lib->vba.NoOfDPP[i][j][k]); in dml20_ModeSupportAndSystemConfigurationFull()
4458 / mode_lib->vba.NoOfDPP[i][j][k]); in dml20_ModeSupportAndSystemConfigurationFull()
4483 / mode_lib->vba.NoOfDPP[i][j][k]); in dml20_ModeSupportAndSystemConfigurationFull()
[all …]
A Ddisplay_mode_vba_20v2.c4026 locals->NoOfDPP[i][j][k] = 1; in dml20v2_ModeSupportAndSystemConfigurationFull()
4030 locals->NoOfDPP[i][j][k] = 2; in dml20v2_ModeSupportAndSystemConfigurationFull()
4060 locals->NoOfDPP[i][j][NumberOfNonSplitPlaneOfMaximumBandwidth] = 2; in dml20v2_ModeSupportAndSystemConfigurationFull()
4073 locals->NoOfDPP[i][j][k] = 1; in dml20v2_ModeSupportAndSystemConfigurationFull()
4077 locals->NoOfDPP[i][j][k] = 2; in dml20v2_ModeSupportAndSystemConfigurationFull()
4519 locals->TotalNumberOfDCCActiveDPP[i][j] + locals->NoOfDPP[i][j][k]; in dml20v2_ModeSupportAndSystemConfigurationFull()
4535 locals->NoOfDPPThisState[k] = locals->NoOfDPP[i][j][k]; in dml20v2_ModeSupportAndSystemConfigurationFull()
4555 / mode_lib->vba.NoOfDPP[i][j][k]); in dml20v2_ModeSupportAndSystemConfigurationFull()
4580 / mode_lib->vba.NoOfDPP[i][j][k]); in dml20v2_ModeSupportAndSystemConfigurationFull()
4605 / mode_lib->vba.NoOfDPP[i][j][k]); in dml20v2_ModeSupportAndSystemConfigurationFull()
[all …]
/drivers/gpu/drm/amd/display/dc/dml/dcn32/
A Ddisplay_mode_vba_32.c2139 mode_lib->vba.NoOfDPP[i][j][k] = 4; in dml32_ModeSupportAndSystemConfigurationFull()
2142 mode_lib->vba.NoOfDPP[i][j][k] = 2; in dml32_ModeSupportAndSystemConfigurationFull()
2145 mode_lib->vba.NoOfDPP[i][j][k] = 1; in dml32_ModeSupportAndSystemConfigurationFull()
2153 mode_lib->vba.NoOfDPP[i][j][k] = 1; in dml32_ModeSupportAndSystemConfigurationFull()
2156 mode_lib->vba.NoOfDPP[i][j][k] = 2; in dml32_ModeSupportAndSystemConfigurationFull()
2161 mode_lib->vba.NoOfDPP[i][j][k] = 1; in dml32_ModeSupportAndSystemConfigurationFull()
2170 if (mode_lib->vba.NoOfDPP[i][j][k] == 1) in dml32_ModeSupportAndSystemConfigurationFull()
2254 mode_lib->vba.NoOfDPPThisState[k] = mode_lib->vba.NoOfDPP[i][j][k]; in dml32_ModeSupportAndSystemConfigurationFull()
2711 + mode_lib->vba.NoOfDPP[i][j][k]; in dml32_ModeSupportAndSystemConfigurationFull()
3087 mode_lib->vba.NoOfDPP, in dml32_ModeSupportAndSystemConfigurationFull()
[all …]
A Ddisplay_mode_vba_util_32.h622 unsigned int NoOfDPP[][2][DC__NUM_DPP__MAX],
A Ddisplay_mode_vba_util_32.c2956 unsigned int NoOfDPP[][2][DC__NUM_DPP__MAX], in dml32_UseMinimumDCFCLK()
3005 + NoOfDPP[i][j][k] * DPTEBytesPerRow[i][j][k] in dml32_UseMinimumDCFCLK()
3010 NoOfDPPState[k] = NoOfDPP[i][j][k]; in dml32_UseMinimumDCFCLK()
A Ddcn32_fpu.c520 num_dpp = vba->NoOfDPP[vba->VoltageLevel][vba->maxMpcComb][vba->pipe_plane[pipe_idx]]; in dcn32_set_phantom_stream_timing()
/drivers/gpu/drm/amd/display/dc/dml/dcn21/
A Ddisplay_mode_vba_21.c3435 myPipe.DPPPerPlane = locals->NoOfDPP[i][j][k]; in CalculatePrefetchSchedulePerPlane()
4120 locals->NoOfDPP[i][j][k] = 1; in dml21_ModeSupportAndSystemConfigurationFull()
4124 locals->NoOfDPP[i][j][k] = 2; in dml21_ModeSupportAndSystemConfigurationFull()
4139 …locals->TotalNumberOfActiveDPP[i][j] = locals->TotalNumberOfActiveDPP[i][j] + locals->NoOfDPP[i][j… in dml21_ModeSupportAndSystemConfigurationFull()
4149 …if (locals->ReadBandwidth[k] > BWOfNonSplitPlaneOfMaximumBandwidth && locals->NoOfDPP[i][j][k] == … in dml21_ModeSupportAndSystemConfigurationFull()
4154 locals->NoOfDPP[i][j][NumberOfNonSplitPlaneOfMaximumBandwidth] = 2; in dml21_ModeSupportAndSystemConfigurationFull()
4167 locals->NoOfDPP[i][j][k] = 1; in dml21_ModeSupportAndSystemConfigurationFull()
4171 locals->NoOfDPP[i][j][k] = 2; in dml21_ModeSupportAndSystemConfigurationFull()
4535 locals->NoOfDPPThisState[k] = locals->NoOfDPP[i][j][k]; in dml21_ModeSupportAndSystemConfigurationFull()
4540 locals->SwathWidthYThisState[k] = locals->SwathWidthYSingleDPP[k] / locals->NoOfDPP[i][j][k]; in dml21_ModeSupportAndSystemConfigurationFull()
[all …]
/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/
A Ddml2_core_dcn4_calcs.c7349 mode_lib->ms.NoOfDPP, in dml_core_ms_prefetch_check()
7536 mode_lib->ms.NoOfDPP, in dml_core_ms_prefetch_check()
8508 mode_lib->ms.NoOfDPP[k] = 1; in dml_core_mode_support()
8512 mode_lib->ms.NoOfDPP[k] = 4; in dml_core_mode_support()
8515 mode_lib->ms.NoOfDPP[k] = 3; in dml_core_mode_support()
8518 mode_lib->ms.NoOfDPP[k] = 2; in dml_core_mode_support()
8521 mode_lib->ms.NoOfDPP[k] = 2; in dml_core_mode_support()
8525 mode_lib->ms.NoOfDPP[k] = 1; in dml_core_mode_support()
9135 mode_lib->ms.NoOfDPP, in dml_core_mode_support()
10539 mode_lib->mp.NoOfDPP, in dml_core_mode_programming()
[all …]
A Ddml2_core_dcn4.c317 …ne_programming[plane_index].num_dpps_required = core->clean_me_up.mode_lib.mp.NoOfDPP[plane_index]; in pack_mode_programming_params_with_implicit_subvp()
579 …ne_programming[plane_index].num_dpps_required = core->clean_me_up.mode_lib.mp.NoOfDPP[plane_index]; in core_dcn4_mode_programming()
A Ddml2_core_shared_types.h566 unsigned int NoOfDPP[DML2_MAX_PLANES]; member
652 unsigned int NoOfDPP[DML2_MAX_PLANES]; member
/drivers/gpu/drm/amd/display/dc/resource/dcn20/
A Ddcn20_resource.c1882 if (v->NoOfDPP[vlevel][0][pipe_idx] == 1 && in dcn20_validate_apply_pipe_split_flags()
1905 if (split4mpc || v->NoOfDPP[vlevel][max_mpc_comb][pipe_plane] == 4) in dcn20_validate_apply_pipe_split_flags()
1907 else if (force_split || v->NoOfDPP[vlevel][max_mpc_comb][pipe_plane] == 2) in dcn20_validate_apply_pipe_split_flags()
1992 if (split[i] != 0 && v->NoOfDPP[vlevel][max_mpc_comb][pipe_idx] == 1) { in dcn20_validate_apply_pipe_split_flags()
/drivers/gpu/drm/amd/display/dc/dml2/
A Ddisplay_mode_core.c4612 s->NoOfDPPState[k] = p->NoOfDPP[j][k]; in UseMinimumDCFCLK()
6282 mode_lib->ms.NoOfDPPThisState[k] = mode_lib->ms.NoOfDPP[j][k]; in dml_prefetch_check()
6369 myPipe->DPPPerSurface = mode_lib->ms.NoOfDPP[j][k]; in dml_prefetch_check()
7142 mode_lib->ms.NoOfDPP[j][k] = 4; in dml_core_mode_support()
7145 mode_lib->ms.NoOfDPP[j][k] = 2; in dml_core_mode_support()
7148 mode_lib->ms.NoOfDPP[j][k] = 1; in dml_core_mode_support()
7153 mode_lib->ms.NoOfDPP[j][k] = 1; in dml_core_mode_support()
7156 mode_lib->ms.NoOfDPP[j][k] = 2; in dml_core_mode_support()
7160 mode_lib->ms.NoOfDPP[j][k] = 1; in dml_core_mode_support()
7168 if (mode_lib->ms.NoOfDPP[j][k] == 1) in dml_core_mode_support()
[all …]
A Ddisplay_mode_core_structs.h985 dml_uint_t NoOfDPP[2][__DML_NUM_PLANES__]; member
1305 dml_uint_t (*NoOfDPP)[__DML_NUM_PLANES__]; member
/drivers/gpu/drm/amd/display/dc/dml/
A Ddisplay_mode_vba.h741 unsigned int NoOfDPP[DC__VOLTAGE_STATES][2][DC__NUM_DPP__MAX]; member

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