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Searched refs:OPP_MASK_SH_LIST_DCN20 (Results 1 – 16 of 16) sorted by relevance

/drivers/gpu/drm/amd/display/dc/opp/dcn35/
A Ddcn35_opp.h37 OPP_MASK_SH_LIST_DCN20(mask_sh), \
/drivers/gpu/drm/amd/display/dc/dcn201/
A Ddcn201_opp.h42 OPP_MASK_SH_LIST_DCN20(mask_sh)
/drivers/gpu/drm/amd/display/dc/opp/dcn20/
A Ddcn20_opp.h86 #define OPP_MASK_SH_LIST_DCN20(mask_sh) \ macro
/drivers/gpu/drm/amd/display/dc/resource/dcn302/
A Ddcn302_resource.c564 OPP_MASK_SH_LIST_DCN20(__SHIFT)
568 OPP_MASK_SH_LIST_DCN20(_MASK)
/drivers/gpu/drm/amd/display/dc/resource/dcn303/
A Ddcn303_resource.c540 OPP_MASK_SH_LIST_DCN20(__SHIFT)
544 OPP_MASK_SH_LIST_DCN20(_MASK)
/drivers/gpu/drm/amd/display/dc/resource/dcn21/
A Ddcn21_resource.c251 OPP_MASK_SH_LIST_DCN20(__SHIFT)
255 OPP_MASK_SH_LIST_DCN20(_MASK)
/drivers/gpu/drm/amd/display/dc/resource/dcn301/
A Ddcn301_resource.c436 OPP_MASK_SH_LIST_DCN20(__SHIFT)
440 OPP_MASK_SH_LIST_DCN20(_MASK)
/drivers/gpu/drm/amd/display/dc/resource/dcn316/
A Ddcn316_resource.c503 OPP_MASK_SH_LIST_DCN20(__SHIFT)
507 OPP_MASK_SH_LIST_DCN20(_MASK)
/drivers/gpu/drm/amd/display/dc/resource/dcn314/
A Ddcn314_resource.c515 OPP_MASK_SH_LIST_DCN20(__SHIFT)
519 OPP_MASK_SH_LIST_DCN20(_MASK)
/drivers/gpu/drm/amd/display/dc/resource/dcn31/
A Ddcn31_resource.c509 OPP_MASK_SH_LIST_DCN20(__SHIFT)
513 OPP_MASK_SH_LIST_DCN20(_MASK)
/drivers/gpu/drm/amd/display/dc/resource/dcn321/
A Ddcn321_resource.c385 OPP_MASK_SH_LIST_DCN20(__SHIFT)
389 OPP_MASK_SH_LIST_DCN20(_MASK)
/drivers/gpu/drm/amd/display/dc/resource/dcn315/
A Ddcn315_resource.c512 OPP_MASK_SH_LIST_DCN20(__SHIFT)
516 OPP_MASK_SH_LIST_DCN20(_MASK)
/drivers/gpu/drm/amd/display/dc/resource/dcn30/
A Ddcn30_resource.c451 OPP_MASK_SH_LIST_DCN20(__SHIFT)
455 OPP_MASK_SH_LIST_DCN20(_MASK)
/drivers/gpu/drm/amd/display/dc/resource/dcn401/
A Ddcn401_resource.c365 OPP_MASK_SH_LIST_DCN20(__SHIFT)
369 OPP_MASK_SH_LIST_DCN20(_MASK)
/drivers/gpu/drm/amd/display/dc/resource/dcn20/
A Ddcn20_resource.c389 OPP_MASK_SH_LIST_DCN20(__SHIFT)
393 OPP_MASK_SH_LIST_DCN20(_MASK)
/drivers/gpu/drm/amd/display/dc/resource/dcn32/
A Ddcn32_resource.c386 OPP_MASK_SH_LIST_DCN20(__SHIFT)
390 OPP_MASK_SH_LIST_DCN20(_MASK)

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