Searched refs:PACKET3_SET_BASE (Results 1 – 17 of 17) sorted by relevance
| /drivers/gpu/drm/amd/amdgpu/ |
| A D | vid.h | 113 #define PACKET3_SET_BASE 0x11 macro
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| A D | cikd.h | 237 #define PACKET3_SET_BASE 0x11 macro
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| A D | soc15d.h | 87 #define PACKET3_SET_BASE 0x11 macro
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| A D | sid.h | 344 #define PACKET3_SET_BASE 0x11 macro
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| A D | nvd.h | 56 #define PACKET3_SET_BASE 0x11 macro
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| A D | gfx_v6_0.c | 2024 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2)); in gfx_v6_0_cp_gfx_start()
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| A D | gfx_v7_0.c | 2481 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2)); in gfx_v7_0_cp_gfx_start()
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| A D | gfx_v8_0.c | 4180 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2)); in gfx_v8_0_cp_gfx_start()
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| A D | gfx_v9_0.c | 3370 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2)); in gfx_v9_0_cp_gfx_start()
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| A D | gfx_v10_0.c | 6418 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2)); in gfx_v10_0_cp_gfx_start()
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| /drivers/gpu/drm/radeon/ |
| A D | nid.h | 1163 #define PACKET3_SET_BASE 0x11 macro
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| A D | sid.h | 1603 #define PACKET3_SET_BASE 0x11 macro
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| A D | cikd.h | 1699 #define PACKET3_SET_BASE 0x11 macro
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| A D | si.c | 3557 radeon_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2)); in si_cp_start()
4442 case PACKET3_SET_BASE: in si_vm_packet3_ce_check()
4520 case PACKET3_SET_BASE: in si_vm_packet3_gfx_check()
4638 case PACKET3_SET_BASE: in si_vm_packet3_compute_check()
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| A D | evergreen_cs.c | 1998 case PACKET3_SET_BASE: in evergreen_packet3_check()
3449 case PACKET3_SET_BASE: in evergreen_vm_packet3_check()
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| A D | evergreend.h | 1549 #define PACKET3_SET_BASE 0x11 macro
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| A D | cik.c | 3990 radeon_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2)); in cik_cp_gfx_start()
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