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Searched refs:PACKET3_SET_CONFIG_REG_START (Results 1 – 16 of 16) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
A Dvid.h341 #define PACKET3_SET_CONFIG_REG_START 0x00002000 macro
A Dcikd.h465 #define PACKET3_SET_CONFIG_REG_START 0x00002000 macro
A Dsoc15d.h429 #define PACKET3_SET_CONFIG_REG_START 0x00002000 macro
A Dsid.h524 #define PACKET3_SET_CONFIG_REG_START 0x00002000 macro
A Dnvd.h514 #define PACKET3_SET_CONFIG_REG_START 0x00002000 macro
A Dgfx_v6_0.c1802 amdgpu_ring_write(ring, mmSCRATCH_REG0 - PACKET3_SET_CONFIG_REG_START); in gfx_v6_0_ring_test_ring()
1832 amdgpu_ring_write(ring, (mmCP_COHER_CNTL2 - PACKET3_SET_CONFIG_REG_START)); in gfx_v6_0_ring_emit_fence()
1909 ib.ptr[1] = mmSCRATCH_REG0 - PACKET3_SET_CONFIG_REG_START; in gfx_v6_0_ring_test_ib()
A Dgfx_v7_0.c2255 amdgpu_ring_write(ring, mmGDS_COMPUTE_MAX_WAVE_ID - PACKET3_SET_CONFIG_REG_START); in gfx_v7_0_ring_emit_ib_compute()
A Dgfx_v8_0.c6091 amdgpu_ring_write(ring, mmGDS_COMPUTE_MAX_WAVE_ID - PACKET3_SET_CONFIG_REG_START); in gfx_v8_0_ring_emit_ib_compute()
/drivers/gpu/drm/radeon/
A Devergreen_cs.c2302 start_reg = (idx_value << 2) + PACKET3_SET_CONFIG_REG_START; in evergreen_packet3_check()
2304 if ((start_reg < PACKET3_SET_CONFIG_REG_START) || in evergreen_packet3_check()
3517 start_reg = (idx_value << 2) + PACKET3_SET_CONFIG_REG_START; in evergreen_vm_packet3_check()
3519 if ((start_reg < PACKET3_SET_CONFIG_REG_START) || in evergreen_vm_packet3_check()
A Dnid.h1270 #define PACKET3_SET_CONFIG_REG_START 0x00008000 macro
A Dsi.c3358 radeon_ring_write(ring, (CP_COHER_CNTL2 - PACKET3_SET_CONFIG_REG_START) >> 2); in si_fence_ring_emit()
3398 PACKET3_SET_CONFIG_REG_START) >> 2)); in si_ring_ib_execute()
3424 radeon_ring_write(ring, (CP_COHER_CNTL2 - PACKET3_SET_CONFIG_REG_START) >> 2); in si_ring_ib_execute()
4602 start_reg = (idx_value << 2) + PACKET3_SET_CONFIG_REG_START; in si_vm_packet3_gfx_check()
4604 if ((start_reg < PACKET3_SET_CONFIG_REG_START) || in si_vm_packet3_gfx_check()
A Dsid.h1783 #define PACKET3_SET_CONFIG_REG_START 0x00008000 macro
A Dcikd.h1926 #define PACKET3_SET_CONFIG_REG_START 0x00008000 macro
A Devergreend.h1666 #define PACKET3_SET_CONFIG_REG_START 0x00008000 macro
A Dni.c1414 PACKET3_SET_CONFIG_REG_START) >> 2)); in cayman_ring_ib_execute()
A Devergreen.c2942 PACKET3_SET_CONFIG_REG_START) >> 2)); in evergreen_ring_ib_execute()

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