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Searched refs:PCH_PP_STATUS (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/i915/gvt/
A Dreg.h135 #define PCH_PP_STATUS _MMIO(0xc7200) macro
A Dhandlers.c70 #define PCH_PP_STATUS _MMIO(0xc7200) macro
392 vgpu_vreg_t(vgpu, PCH_PP_STATUS) |= PP_ON; in pch_pp_control_mmio_write()
393 vgpu_vreg_t(vgpu, PCH_PP_STATUS) |= PP_SEQUENCE_STATE_ON_IDLE; in pch_pp_control_mmio_write()
394 vgpu_vreg_t(vgpu, PCH_PP_STATUS) &= ~PP_SEQUENCE_POWER_DOWN; in pch_pp_control_mmio_write()
395 vgpu_vreg_t(vgpu, PCH_PP_STATUS) &= ~PP_CYCLE_DELAY_ACTIVE; in pch_pp_control_mmio_write()
398 vgpu_vreg_t(vgpu, PCH_PP_STATUS) &= in pch_pp_control_mmio_write()
/drivers/gpu/drm/i915/
A Dintel_gvt_mmio_table.c393 MMIO_D(PCH_PP_STATUS); in iterate_generic_mmio()
/drivers/pci/
A Dquirks.c3933 #define PCH_PP_STATUS 0xc7200 macro
3967 val = ioread32(mmio_base + PCH_PP_STATUS); in reset_ivb_igd()

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