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Searched refs:PHYCLKD18PerState (Results 1 – 8 of 8) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dml/dcn32/
A Ddisplay_mode_vba_util_32.h251 double PHYCLKD18PerState,
A Ddisplay_mode_vba_util_32.c1338 double PHYCLKD18PerState, in dml32_CalculateOutputLink() argument
A Ddisplay_mode_vba_32.c2089 mode_lib->vba.PHYCLKD18PerState[i], in dml32_ModeSupportAndSystemConfigurationFull()
/drivers/gpu/drm/amd/display/dc/dml/
A Ddisplay_mode_vba.h1088 double PHYCLKD18PerState[DC__VOLTAGE_STATES]; member
A Ddisplay_mode_vba.c399 mode_lib->vba.PHYCLKD18PerState[i] = soc->clock_limits[i].phyclk_d18_mhz; in fetch_socbb_params()
/drivers/gpu/drm/amd/display/dc/dml/dcn31/
A Ddisplay_mode_vba_31.c4330 v->PHYCLKD18PerState[k] >= 10000.0 / 18.0) {
4346 if (v->Outbpp == BPP_INVALID && v->PHYCLKD18PerState[k] < 13500.0 / 18.0 &&
4372 v->PHYCLKD18PerState[k] >= 13500.0 / 18.0) {
4388 if (v->Outbpp == BPP_INVALID && v->PHYCLKD18PerState[k] < 20000.0 / 18.0 &&
4414 v->PHYCLKD18PerState[k] >= 20000.0 / 18.0) {
/drivers/gpu/drm/amd/display/dc/dml/dcn314/
A Ddisplay_mode_vba_314.c4417 v->PHYCLKD18PerState[k] >= 10000.0 / 18.0) {
4433 if (v->Outbpp == BPP_INVALID && v->PHYCLKD18PerState[k] < 13500.0 / 18.0 &&
4459 v->PHYCLKD18PerState[k] >= 13500.0 / 18.0) {
4475 if (v->Outbpp == BPP_INVALID && v->PHYCLKD18PerState[k] < 20000.0 / 18.0 &&
4501 v->PHYCLKD18PerState[k] >= 20000.0 / 18.0) {
/drivers/gpu/drm/amd/display/dc/dml2/
A Ddisplay_mode_core.c76 dml_float_t PHYCLKD18PerState,
5343 dml_float_t PHYCLKD18PerState, in CalculateOutputLink() argument

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