Searched refs:PHY_C10_VDR_CONTROL (Results 1 – 2 of 2) sorted by relevance
| /drivers/gpu/drm/i915/display/ |
| A D | intel_cx0_phy.c | 478 intel_cx0_rmw(encoder, owned_lane_mask, PHY_C10_VDR_CONTROL(1), in intel_cx0_phy_set_signal_levels()
519 intel_cx0_rmw(encoder, owned_lane_mask, PHY_C10_VDR_CONTROL(1), in intel_cx0_phy_set_signal_levels()
2121 intel_cx0_rmw(encoder, lane, PHY_C10_VDR_CONTROL(1), in intel_c10pll_readout_hw_state()
2140 intel_cx0_rmw(encoder, INTEL_CX0_BOTH_LANES, PHY_C10_VDR_CONTROL(1), in intel_c10_pll_program()
2157 intel_cx0_rmw(encoder, INTEL_CX0_LANE0, PHY_C10_VDR_CONTROL(1), in intel_c10_pll_program()
2955 PHY_C10_VDR_CONTROL(1), 0, in intel_cx0_program_phy_lane()
2984 PHY_C10_VDR_CONTROL(1), 0, in intel_cx0_program_phy_lane()
3255 intel_cx0_rmw(encoder, owned_lane_mask, PHY_C10_VDR_CONTROL(1), 0, in intel_lnl_mac_transmit_lfps()
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| A D | intel_cx0_phy_regs.h | 267 #define PHY_C10_VDR_CONTROL(idx) (0xC70 + (idx) - 1) macro
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