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Searched refs:PIPE_CONFIG (Results 1 – 14 of 14) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
A Dgfx_v6_0.c854 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v6_0_tiling_mode_table_init()
862 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v6_0_tiling_mode_table_init()
870 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v6_0_tiling_mode_table_init()
878 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v6_0_tiling_mode_table_init()
886 PIPE_CONFIG(ADDR_SURF_P2); in gfx_v6_0_tiling_mode_table_init()
889 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v6_0_tiling_mode_table_init()
897 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v6_0_tiling_mode_table_init()
905 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v6_0_tiling_mode_table_init()
914 PIPE_CONFIG(ADDR_SURF_P2); in gfx_v6_0_tiling_mode_table_init()
941 PIPE_CONFIG(ADDR_SURF_P2); in gfx_v6_0_tiling_mode_table_init()
[all …]
A Dgfx_v8_0.c2079 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()
2083 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()
2087 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()
2091 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()
2095 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()
2099 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()
2103 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()
2107 PIPE_CONFIG(ADDR_SURF_P2)); in gfx_v8_0_tiling_mode_table_init()
2109 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()
3034 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()
[all …]
A Dgfx_v7_0.c1379 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v7_0_tiling_mode_table_init()
1383 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v7_0_tiling_mode_table_init()
1387 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v7_0_tiling_mode_table_init()
1391 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v7_0_tiling_mode_table_init()
1395 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v7_0_tiling_mode_table_init()
1399 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v7_0_tiling_mode_table_init()
1402 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v7_0_tiling_mode_table_init()
1407 PIPE_CONFIG(ADDR_SURF_P2)); in gfx_v7_0_tiling_mode_table_init()
1409 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v7_0_tiling_mode_table_init()
1412 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v7_0_tiling_mode_table_init()
[all …]
A Dcikd.h196 # define PIPE_CONFIG(x) ((x) << 6) macro
A Ddce_v8_0.c1843 pipe_config = AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG); in dce_v8_0_crtc_do_set_base()
A Ddce_v6_0.c2032 pipe_config = AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG); in dce_v6_0_crtc_do_set_base()
A Ddce_v10_0.c1896 pipe_config = AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG); in dce_v10_0_crtc_do_set_base()
A Ddce_v11_0.c1946 pipe_config = AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG); in dce_v11_0_crtc_do_set_base()
/drivers/gpu/drm/radeon/
A Dcik.c2870 PIPE_CONFIG(ADDR_SURF_P2) | in cik_tiling_mode_table_init()
2874 PIPE_CONFIG(ADDR_SURF_P2) | in cik_tiling_mode_table_init()
2878 PIPE_CONFIG(ADDR_SURF_P2) | in cik_tiling_mode_table_init()
2882 PIPE_CONFIG(ADDR_SURF_P2) | in cik_tiling_mode_table_init()
2886 PIPE_CONFIG(ADDR_SURF_P2) | in cik_tiling_mode_table_init()
2889 PIPE_CONFIG(ADDR_SURF_P2) | in cik_tiling_mode_table_init()
2893 PIPE_CONFIG(ADDR_SURF_P2) | in cik_tiling_mode_table_init()
2897 PIPE_CONFIG(ADDR_SURF_P2) | in cik_tiling_mode_table_init()
2900 PIPE_CONFIG(ADDR_SURF_P2); in cik_tiling_mode_table_init()
2903 PIPE_CONFIG(ADDR_SURF_P2)); in cik_tiling_mode_table_init()
[all …]
A Dsi.c2713 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in si_tiling_mode_table_init()
2722 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in si_tiling_mode_table_init()
2731 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in si_tiling_mode_table_init()
2740 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in si_tiling_mode_table_init()
2749 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in si_tiling_mode_table_init()
2758 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in si_tiling_mode_table_init()
2767 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in si_tiling_mode_table_init()
2776 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in si_tiling_mode_table_init()
2785 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in si_tiling_mode_table_init()
2794 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in si_tiling_mode_table_init()
[all …]
A Dsid.h1185 # define PIPE_CONFIG(x) ((x) << 6) macro
A Dcikd.h1225 # define PIPE_CONFIG(x) ((x) << 6) macro
/drivers/gpu/drm/amd/display/amdgpu_dm/
A Damdgpu_dm_plane.c210 AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG); in amdgpu_dm_plane_fill_gfx8_tiling_info_from_flags()
/drivers/gpu/drm/amd/include/
A Dnavi10_enum.h1696 typedef enum PIPE_CONFIG { enum
1712 } PIPE_CONFIG; typedef

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