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Searched refs:PIPE_D (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/i915/display/
A Dskl_watermark.c870 [PIPE_D] = BIT(DBUF_S2),
877 [PIPE_D] = BIT(DBUF_S2),
885 [PIPE_D] = BIT(DBUF_S2),
892 [PIPE_D] = BIT(DBUF_S2),
900 [PIPE_D] = BIT(DBUF_S2),
908 [PIPE_D] = BIT(DBUF_S2),
917 [PIPE_D] = BIT(DBUF_S2),
1003 [PIPE_D] = BIT(DBUF_S4),
1011 [PIPE_D] = BIT(DBUF_S4),
1019 [PIPE_D] = BIT(DBUF_S4),
[all …]
A Dintel_display_limits.h20 PIPE_D, enumerator
37 TRANSCODER_D = PIPE_D,
A Dintel_display_power_map.c948 .irq_pipe_mask = BIT(PIPE_D),
1186 .irq_pipe_mask = BIT(PIPE_D),
1360 .irq_pipe_mask = BIT(PIPE_D),
1517 .irq_pipe_mask = BIT(PIPE_D),
1678 .irq_pipe_mask = BIT(PIPE_D),
A Dintel_display_device.c198 [PIPE_D] = TGL_CURSOR_D_OFFSET, \
995 BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D), \
1162 BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D)
1340 BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D), \
1835 display_runtime->pipe_mask &= ~BIT(PIPE_D); in __intel_display_device_info_runtime_init()
A Dintel_dmc.c471 for (pipe = PIPE_A; pipe <= PIPE_D; pipe++) in adlp_pipedmc_clock_gating_wa()
475 for (pipe = PIPE_C; pipe <= PIPE_D; pipe++) in adlp_pipedmc_clock_gating_wa()
868 PIPE_D_DMC_W2_PTS_CONFIG_SELECT(PIPE_D) | in intel_dmc_load_program()
A Dicl_dsi.c828 case PIPE_D: in gen11_dsi_configure_transcoder()
1728 *pipe = PIPE_D; in gen11_dsi_get_hw_state()
A Dintel_display.c3439 pipes = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D); in joiner_pipes()
3768 trans_pipe = PIPE_D; in hsw_enabled_transcoders()

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