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Searched refs:PIPE_VBLANK_INTERRUPT_STATUS (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/gma500/
A Dpsb_intel_reg.h515 #define PIPE_VBLANK_INTERRUPT_STATUS (1UL << 1) macro
/drivers/gpu/drm/i915/display/
A Dintel_display_irq.c587 if (pipe_stats[pipe] & PIPE_VBLANK_INTERRUPT_STATUS) in i915_pipestat_irq_handler()
1583 i915_enable_pipestat(display, pipe, PIPE_VBLANK_INTERRUPT_STATUS); in i8xx_enable_vblank()
1596 i915_disable_pipestat(display, pipe, PIPE_VBLANK_INTERRUPT_STATUS); in i8xx_disable_vblank()
A Dintel_display_regs.h835 #define PIPE_VBLANK_INTERRUPT_STATUS (1UL << 1) macro

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