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Searched refs:PIXEL_RATE_CNTL (Results 1 – 23 of 23) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dce/
A Ddce_clock_source.h72 SRII(PIXEL_RATE_CNTL, OTG, 0),\
73 SRII(PIXEL_RATE_CNTL, OTG, 1),\
74 SRII(PIXEL_RATE_CNTL, OTG, 2),\
77 SRII(PIXEL_RATE_CNTL, OTG, 5)
86 SRII(PIXEL_RATE_CNTL, OTG, 1)
101 SRII(PIXEL_RATE_CNTL, OTG, 3)
116 SRII(PIXEL_RATE_CNTL, OTG, 3)
131 SRII(PIXEL_RATE_CNTL, OTG, 3)
149 SRII(PIXEL_RATE_CNTL, OTG, 4)
158 SRII(PIXEL_RATE_CNTL, OTG, 1)
[all …]
A Ddce_clock_source.c999 REG_UPDATE_2(PIXEL_RATE_CNTL[inst], in dcn31_program_pix_clk()
1003 REG_UPDATE_2(PIXEL_RATE_CNTL[inst], in dcn31_program_pix_clk()
1007 REG_UPDATE(PIXEL_RATE_CNTL[inst], in dcn31_program_pix_clk()
1012 REG_UPDATE(PIXEL_RATE_CNTL[inst], in dcn31_program_pix_clk()
1312 REG_UPDATE(PIXEL_RATE_CNTL[inst], DP_DTO0_ENABLE, 0); in dcn20_override_dp_pix_clk()
1315 REG_UPDATE(PIXEL_RATE_CNTL[inst], DP_DTO0_ENABLE, 1); in dcn20_override_dp_pix_clk()
1352 REG_UPDATE_2(PIXEL_RATE_CNTL[inst], in dcn3_program_pix_clk()
1356 REG_UPDATE(PIXEL_RATE_CNTL[inst], in dcn3_program_pix_clk()
/drivers/gpu/drm/amd/display/dc/dccg/dcn31/
A Ddcn31_dccg.h47 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 0),\
48 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 1),\
49 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 2),\
50 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 3),\
125 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, DIV, 0, mask_sh),\
126 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, DIV, 1, mask_sh),\
127 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, DIV, 2, mask_sh),\
129 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 0, mask_sh),\
130 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 1, mask_sh),\
131 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 2, mask_sh),\
[all …]
/drivers/gpu/drm/amd/display/dc/dccg/dcn32/
A Ddcn32_dccg.h80 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 0, mask_sh),\
81 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 1, mask_sh),\
82 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 2, mask_sh),\
88 DCCG_SFII(OTG, PIXEL_RATE_CNTL, PIPE, DTO_SRC_SEL, 0, mask_sh),\
89 DCCG_SFII(OTG, PIXEL_RATE_CNTL, PIPE, DTO_SRC_SEL, 1, mask_sh),\
90 DCCG_SFII(OTG, PIXEL_RATE_CNTL, PIPE, DTO_SRC_SEL, 2, mask_sh),\
91 DCCG_SFII(OTG, PIXEL_RATE_CNTL, PIPE, DTO_SRC_SEL, 3, mask_sh),\
92 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 0, mask_sh),\
93 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 1, mask_sh),\
94 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 2, mask_sh),\
[all …]
/drivers/gpu/drm/amd/display/dc/dccg/dcn314/
A Ddcn314_dccg.h52 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 0),\
53 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 1),\
54 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 2),\
55 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 3),\
119 DCCG_SFII(OTG, PIXEL_RATE_CNTL, PIPE, DTO_SRC_SEL, 0, mask_sh),\
120 DCCG_SFII(OTG, PIXEL_RATE_CNTL, PIPE, DTO_SRC_SEL, 1, mask_sh),\
121 DCCG_SFII(OTG, PIXEL_RATE_CNTL, PIPE, DTO_SRC_SEL, 2, mask_sh),\
123 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 0, mask_sh),\
124 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 1, mask_sh),\
125 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 2, mask_sh),\
[all …]
/drivers/gpu/drm/amd/display/dc/dccg/dcn35/
A Ddcn35_dccg.h110 DCCG_SFII(OTG, PIXEL_RATE_CNTL, PIPE, DTO_SRC_SEL, 0, mask_sh),\
111 DCCG_SFII(OTG, PIXEL_RATE_CNTL, PIPE, DTO_SRC_SEL, 1, mask_sh),\
112 DCCG_SFII(OTG, PIXEL_RATE_CNTL, PIPE, DTO_SRC_SEL, 2, mask_sh),\
114 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 0, mask_sh),\
115 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 1, mask_sh),\
116 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 2, mask_sh),\
117 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 3, mask_sh),\
127 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, DROP_PIXEL, 0, mask_sh),\
128 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, DROP_PIXEL, 1, mask_sh),\
129 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, DROP_PIXEL, 2, mask_sh),\
[all …]
/drivers/gpu/drm/amd/display/dc/dccg/dcn20/
A Ddcn20_dccg.h38 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 0),\
39 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 1),\
46 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 2),\
47 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 3),\
48 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 4),\
49 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 5)
81 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 0, mask_sh),\
82 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 1, mask_sh),\
84 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, DROP_PIXEL, 1, mask_sh)
102 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, DROP_PIXEL, 5, mask_sh)
[all …]
/drivers/gpu/drm/amd/display/dc/dccg/dcn401/
A Ddcn401_dccg.h77 DCCG_SFII(OTG, PIXEL_RATE_CNTL, PIPE, DTO_SRC_SEL, 0, mask_sh),\
78 DCCG_SFII(OTG, PIXEL_RATE_CNTL, PIPE, DTO_SRC_SEL, 1, mask_sh),\
79 DCCG_SFII(OTG, PIXEL_RATE_CNTL, PIPE, DTO_SRC_SEL, 2, mask_sh),\
81 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 0, mask_sh),\
82 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 1, mask_sh),\
83 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 2, mask_sh),\
84 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 3, mask_sh),\
108 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DP_DTO, ENABLE, 0, mask_sh),\
109 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DP_DTO, ENABLE, 1, mask_sh),\
110 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DP_DTO, ENABLE, 2, mask_sh),\
[all …]
/drivers/gpu/drm/amd/display/dc/dccg/dcn303/
A Ddcn303_dccg.h38 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 0),\
39 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 1)
59 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 0, mask_sh),\
60 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 1, mask_sh),\
61 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, DROP_PIXEL, 0, mask_sh),\
62 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, DROP_PIXEL, 1, mask_sh)
/drivers/gpu/drm/amd/display/dc/dccg/dcn30/
A Ddcn30_dccg.h35 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 2),\
36 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 3),\
37 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 4),\
38 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 5),\
/drivers/gpu/drm/amd/display/dc/resource/dcn36/
A Ddcn36_resource.h35 SRII(PIXEL_RATE_CNTL, OTG, 0), \
36 SRII(PIXEL_RATE_CNTL, OTG, 1),\
37 SRII(PIXEL_RATE_CNTL, OTG, 2),\
38 SRII(PIXEL_RATE_CNTL, OTG, 3),\
/drivers/gpu/drm/amd/display/dc/hwss/dce/
A Ddce_hwseq.h66 SRII(PIXEL_RATE_CNTL, blk, 0), \
71 SRII(PIXEL_RATE_CNTL, blk, 5)
75 SRII(PIXEL_RATE_CNTL, blk, 1)
87 SRII(PIXEL_RATE_CNTL, blk, 1),\
88 SRII(PIXEL_RATE_CNTL, blk, 2),\
91 SRII(PIXEL_RATE_CNTL, blk, 5)
103 SRII(PIXEL_RATE_CNTL, blk, 1),\
104 SRII(PIXEL_RATE_CNTL, blk, 2),\
106 SRII(PIXEL_RATE_CNTL, blk, 4)
117 SRII(PIXEL_RATE_CNTL, blk, 1)
[all …]
A Ddce_hwseq.c180 REG_UPDATE(PIXEL_RATE_CNTL[tg_inst], in dce_crtc_switch_to_clk_src()
190 REG_UPDATE(PIXEL_RATE_CNTL[tg_inst], in dce_crtc_switch_to_clk_src()
196 REG_UPDATE_2(PIXEL_RATE_CNTL[tg_inst], in dce_crtc_switch_to_clk_src()
/drivers/gpu/drm/amd/display/dc/resource/dcn35/
A Ddcn35_resource.h174 SRII(PIXEL_RATE_CNTL, OTG, 0), \
175 SRII(PIXEL_RATE_CNTL, OTG, 1),\
176 SRII(PIXEL_RATE_CNTL, OTG, 2),\
177 SRII(PIXEL_RATE_CNTL, OTG, 3),\
/drivers/gpu/drm/amd/display/dc/resource/dcn32/
A Ddcn32_resource.h208 SRII_ARR_2(PIXEL_RATE_CNTL, OTG, 0, index), \
209 SRII_ARR_2(PIXEL_RATE_CNTL, OTG, 1, index), \
210 SRII_ARR_2(PIXEL_RATE_CNTL, OTG, 2, index), \
211 SRII_ARR_2(PIXEL_RATE_CNTL, OTG, 3, index)
1244 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 0), DCCG_SRII(PIXEL_RATE_CNTL, OTG, 1), \
1245 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 2), DCCG_SRII(PIXEL_RATE_CNTL, OTG, 3), \
A Ddcn32_resource.c540 SRII(PIXEL_RATE_CNTL, OTG, 0), \
541 SRII(PIXEL_RATE_CNTL, OTG, 1),\
542 SRII(PIXEL_RATE_CNTL, OTG, 2),\
543 SRII(PIXEL_RATE_CNTL, OTG, 3),\
/drivers/gpu/drm/amd/display/dc/resource/dcn401/
A Ddcn401_resource.h629 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 0), DCCG_SRII(PIXEL_RATE_CNTL, OTG, 1), \
630 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 2), DCCG_SRII(PIXEL_RATE_CNTL, OTG, 3), \
A Ddcn401_resource.c515 SRII(PIXEL_RATE_CNTL, OTG, 0), \
516 SRII(PIXEL_RATE_CNTL, OTG, 1),\
517 SRII(PIXEL_RATE_CNTL, OTG, 2),\
518 SRII(PIXEL_RATE_CNTL, OTG, 3),\
/drivers/gpu/drm/amd/display/dc/resource/dcn316/
A Ddcn316_resource.c683 SRII(PIXEL_RATE_CNTL, OTG, 0), \
684 SRII(PIXEL_RATE_CNTL, OTG, 1),\
685 SRII(PIXEL_RATE_CNTL, OTG, 2),\
686 SRII(PIXEL_RATE_CNTL, OTG, 3),\
/drivers/gpu/drm/amd/display/dc/resource/dcn314/
A Ddcn314_resource.c696 SRII(PIXEL_RATE_CNTL, OTG, 0), \
697 SRII(PIXEL_RATE_CNTL, OTG, 1),\
698 SRII(PIXEL_RATE_CNTL, OTG, 2),\
699 SRII(PIXEL_RATE_CNTL, OTG, 3),\
/drivers/gpu/drm/amd/display/dc/resource/dcn31/
A Ddcn31_resource.c689 SRII(PIXEL_RATE_CNTL, OTG, 0), \
690 SRII(PIXEL_RATE_CNTL, OTG, 1),\
691 SRII(PIXEL_RATE_CNTL, OTG, 2),\
692 SRII(PIXEL_RATE_CNTL, OTG, 3),\
/drivers/gpu/drm/amd/display/dc/resource/dcn321/
A Ddcn321_resource.c536 SRII(PIXEL_RATE_CNTL, OTG, 0), \
537 SRII(PIXEL_RATE_CNTL, OTG, 1),\
538 SRII(PIXEL_RATE_CNTL, OTG, 2),\
539 SRII(PIXEL_RATE_CNTL, OTG, 3),\
/drivers/gpu/drm/amd/display/dc/resource/dcn315/
A Ddcn315_resource.c688 SRII(PIXEL_RATE_CNTL, OTG, 0), \
689 SRII(PIXEL_RATE_CNTL, OTG, 1),\
690 SRII(PIXEL_RATE_CNTL, OTG, 2),\
691 SRII(PIXEL_RATE_CNTL, OTG, 3),\

Completed in 56 milliseconds