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Searched refs:PLANE_1 (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/i915/display/
A Dintel_display_limits.h74 PLANE_1, enumerator
87 PLANE_PRIMARY = PLANE_1,
A Dskl_universal_plane.c253 return BIT(PLANE_1) | BIT(PLANE_2) | BIT(PLANE_3); in icl_hdr_plane_mask()
2430 return plane_id == PLANE_1; in skl_plane_has_fbc()
2454 if (plane_id != PLANE_1 && plane_id != PLANE_2) in skl_plane_has_planar()
2718 (plane_id == PLANE_1 || plane_id == PLANE_2); in skl_plane_has_rc_ccs()
2894 if (HAS_ASYNC_FLIPS(display) && plane_id == PLANE_1) { in skl_universal_plane_create()
2925 if (plane_id == PLANE_1) in skl_universal_plane_create()
A Dintel_display_irq.c1119 { .fault = GEN9_PIPE_PLANE1_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_1, },
1132 { .fault = GEN9_PIPE_PLANE1_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_1, },
1144 { .fault = GEN9_PIPE_PLANE1_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_1, },
1153 { .fault = GEN9_PIPE_PLANE1_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_1, },
A Dintel_crtc.c321 primary = skl_universal_plane_create(display, pipe, PLANE_1); in intel_crtc_init()
A Dintel_display_regs.h1273 REG_BIT(((plane_id) >= PLANE_5 ? 16 - PLANE_5 : 3 - PLANE_1) + (plane_id)) /* skl+ */

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