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Searched refs:PLL_CFG1 (Results 1 – 2 of 2) sorted by relevance

/drivers/clk/imx/
A Dclk-frac-pll.c22 #define PLL_CFG1 0x4 macro
106 val = readl_relaxed(pll->base + PLL_CFG1); in clk_pll_recalc_rate()
174 val = readl_relaxed(pll->base + PLL_CFG1); in clk_pll_set_rate()
177 writel_relaxed(val, pll->base + PLL_CFG1); in clk_pll_set_rate()
A Dclk-sscg-pll.c23 #define PLL_CFG1 0x4 macro

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