Searched refs:PLL_LOCK_TIME (Results 1 – 5 of 5) sorted by relevance
| /drivers/phy/qualcomm/ |
| A D | phy-qcom-m31-eusb2.c | 56 #define PLL_LOCK_TIME GENMASK(1, 0) macro
92 M31_EUSB_PHY_INIT_CFG(USB_PHY_XCFGI_7_0, PLL_LOCK_TIME, 0),
|
| /drivers/phy/ti/ |
| A D | phy-am654-serdes.c | 73 #define PLL_LOCK_TIME 100000 /* in microseconds */ macro
256 1000, PLL_LOCK_TIME); in serdes_am654_enable_pll()
321 val, SLEEP_TIME, PLL_LOCK_TIME); in serdes_am654_power_on()
|
| A D | phy-ti-pipe3.c | 124 #define PLL_LOCK_TIME 100 /* in milliseconds */ macro
392 timeout = jiffies + msecs_to_jiffies(PLL_LOCK_TIME); in ti_pipe3_dpll_wait_lock()
|
| /drivers/clk/davinci/ |
| A D | pll.c | 92 #define PLL_LOCK_TIME 20 macro
331 udelay(PLL_LOCK_TIME); in davinci_pllen_rate_change()
|
| /drivers/phy/cadence/ |
| A D | phy-cadence-sierra.c | 234 #define PLL_LOCK_TIME 100000 macro
636 val, !val, 1000, PLL_LOCK_TIME); in cdns_sierra_phy_on()
648 1000, PLL_LOCK_TIME); in cdns_sierra_phy_on()
655 val, val, 1000, PLL_LOCK_TIME); in cdns_sierra_phy_on()
|
Completed in 23 milliseconds