Searched refs:POR (Results 1 – 6 of 6) sorted by relevance
| /drivers/phy/qualcomm/ |
| A D | phy-qcom-m31-eusb2.c | 25 #define POR BIT(1) macro
83 M31_EUSB_PHY_INIT_CFG(USB_PHY_UTMI_CTRL5, POR, 1),
101 M31_EUSB_PHY_INIT_CFG(USB_PHY_UTMI_CTRL5, POR, 0),
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| A D | phy-qcom-snps-femto-v2.c | 31 #define POR BIT(1) macro
421 POR, POR); in qcom_snps_hsphy_init()
459 POR, 0); in qcom_snps_hsphy_init()
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| /drivers/phy/ |
| A D | phy-snps-eusb2.c | 55 #define POR BIT(1) macro
375 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_UTMI_CTRL5, POR, POR); in qcom_snps_eusb2_hsphy_init()
435 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_UTMI_CTRL5, POR, 0); in qcom_snps_eusb2_hsphy_init()
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| /drivers/soc/fsl/ |
| A D | Kconfig | 16 enabling, power-onreset(POR) configuration monitoring, alternate
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| /drivers/bus/mhi/host/ |
| A D | internal.h | 128 mhi_pm_state(POR, "POWER ON RESET") \
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| /drivers/firmware/arm_scmi/vendors/imx/ |
| A D | imx95.rst | 368 POR, WDOG, JTAG and etc.
401 | |Bit[7:0] Reason(WDOG, POR, FCCU and etc): |
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