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Searched refs:PORT_PLL_M2_FRAC_MASK (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/i915/display/
A Dbxt_dpio_phy_regs.h74 #define PORT_PLL_M2_FRAC_MASK REG_GENMASK(21, 0) macro
75 #define PORT_PLL_M2_FRAC(m2_frac) REG_FIELD_PREP(PORT_PLL_M2_FRAC_MASK, (m2_frac))
A Dintel_dpll_mgr.c2083 PORT_PLL_M2_FRAC_MASK, hw_state->pll2); in bxt_ddi_pll_enable()
2200 hw_state->pll2 &= PORT_PLL_M2_FRAC_MASK; in bxt_ddi_pll_get_hw_state()
2372 clock.m2 |= REG_FIELD_GET(PORT_PLL_M2_FRAC_MASK, in bxt_ddi_pll_get_freq()
/drivers/gpu/drm/i915/gvt/
A Dhandlers.c588 clock.m2 |= REG_FIELD_GET(PORT_PLL_M2_FRAC_MASK, in bxt_vgpu_get_dp_bitrate()

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