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Searched refs:PPSMC_Result_OK (Results 1 – 25 of 39) sorted by relevance

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/drivers/gpu/drm/radeon/
A Dci_dpm.c706 if (smc_result == PPSMC_Result_OK) in ci_enable_thermal_based_sclk_dpm()
887 if (result != PPSMC_Result_OK) { in ci_thermal_enable_alert()
896 if (result != PPSMC_Result_OK) { in ci_thermal_enable_alert()
1013 if (ret != PPSMC_Result_OK) in ci_fan_ctrl_start_smc_fan_control()
1018 if (ret != PPSMC_Result_OK) in ci_fan_ctrl_start_smc_fan_control()
1024 if (ret != PPSMC_Result_OK) in ci_fan_ctrl_start_smc_fan_control()
1038 if (ret == PPSMC_Result_OK) { in ci_fan_ctrl_stop_smc_fan_control()
1504 if (smc_result != PPSMC_Result_OK) in ci_start_dpm()
3775 if (result != PPSMC_Result_OK) in ci_upload_dpm_level_enable_mask()
3785 if (result != PPSMC_Result_OK) in ci_upload_dpm_level_enable_mask()
[all …]
A Dci_smc.c173 return PPSMC_Result_OK;
182 return PPSMC_Result_OK;
A Dsi_dpm.c2385 if (smc_result != PPSMC_Result_OK) { in si_enable_power_containment()
2394 if (smc_result != PPSMC_Result_OK) in si_enable_power_containment()
2748 if (smc_result != PPSMC_Result_OK) in si_enable_smc_cac()
2753 if (smc_result != PPSMC_Result_OK) { in si_enable_smc_cac()
2762 if (smc_result != PPSMC_Result_OK) in si_enable_smc_cac()
3296 if (ret == PPSMC_Result_OK)
5755 PPSMC_Result_OK) ?
5759 PPSMC_Result_OK) ? 0 : -EINVAL;
5906 if (result != PPSMC_Result_OK) { in si_thermal_enable_alert()
6049 if (ret == PPSMC_Result_OK) { in si_fan_ctrl_start_smc_fan_control()
[all …]
A Dsi_smc.c199 return PPSMC_Result_OK; in si_wait_for_smc_inactive()
208 return PPSMC_Result_OK; in si_wait_for_smc_inactive()
A Drv770_dpm.c196 if (result != PPSMC_Result_OK) in rv770_stop_dpm()
1403 if (rv770_send_msg_to_smc(rdev, PPSMC_MSG_Halt) != PPSMC_Result_OK) in rv770_halt_smc()
1406 if (rv770_wait_for_smc_inactive(rdev) != PPSMC_Result_OK) in rv770_halt_smc()
1414 if (rv770_send_msg_to_smc(rdev, PPSMC_MSG_Resume) != PPSMC_Result_OK) in rv770_resume_smc()
1421 if (rv770_send_msg_to_smc(rdev, PPSMC_MSG_SwitchToSwState) != PPSMC_Result_OK) in rv770_set_sw_state()
1428 if (rv770_send_msg_to_smc(rdev, PPSMC_MSG_SwitchToInitialState) != PPSMC_Result_OK) in rv770_set_boot_state()
1484 if (rv770_send_msg_to_smc(rdev, PPSMC_MSG_ZeroLevelsDisabled) != PPSMC_Result_OK) in rv770_dpm_force_performance_level()
1488 if (rv770_send_msg_to_smc(rdev, PPSMC_MSG_NoForcedLevel) != PPSMC_Result_OK) in rv770_dpm_force_performance_level()
1492 if (rv770_send_msg_to_smc(rdev, PPSMC_MSG_NoForcedLevel) != PPSMC_Result_OK) in rv770_dpm_force_performance_level()
1497 if (rv770_send_msg_to_smc(rdev, msg) != PPSMC_Result_OK) in rv770_dpm_force_performance_level()
[all …]
/drivers/gpu/drm/amd/pm/legacy-dpm/
A Dsi_smc.c197 return PPSMC_Result_OK; in amdgpu_si_wait_for_smc_inactive()
206 return PPSMC_Result_OK; in amdgpu_si_wait_for_smc_inactive()
/drivers/gpu/drm/amd/pm/powerplay/smumgr/
A Dvega20_smumgr.c117 if (ret != PPSMC_Result_OK) in vega20_send_msg_to_smc()
120 return (ret == PPSMC_Result_OK) ? 0 : -EIO; in vega20_send_msg_to_smc()
145 if (ret != PPSMC_Result_OK) in vega20_send_msg_to_smc_with_parameter()
148 return (ret == PPSMC_Result_OK) ? 0 : -EIO; in vega20_send_msg_to_smc_with_parameter()
/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
A Dsmu_v13_0_5_ppsmc.h28 #define PPSMC_Result_OK 0x1 macro
A Dsmu_v11_8_ppsmc.h28 #define PPSMC_Result_OK 0x1 macro
A Dsmu_v13_0_1_ppsmc.h35 #define PPSMC_Result_OK 0x1 ///< Message Response OK macro
A Dsmu_v13_0_4_ppsmc.h43 #define PPSMC_Result_OK 0x1 ///< Message Response OK macro
A Dsmu_v12_0_ppsmc.h28 #define PPSMC_Result_OK 0x1 macro
A Dsmu_v14_0_0_ppsmc.h43 #define PPSMC_Result_OK 0x1 ///< Message Response OK macro
A Darcturus_ppsmc.h30 #define PPSMC_Result_OK 0x1 macro
A Dsmu_v11_0_7_ppsmc.h30 #define PPSMC_Result_OK 0x1 macro
A Dsmu_v11_0_ppsmc.h28 #define PPSMC_Result_OK 0x1 macro
A Dsmu_v13_0_7_ppsmc.h29 #define PPSMC_Result_OK 0x1 macro
A Daldebaran_ppsmc.h30 #define PPSMC_Result_OK 0x1 macro
A Dsmu_v11_5_ppsmc.h28 #define PPSMC_Result_OK 0x1 macro
A Dsmu_v13_0_0_ppsmc.h31 #define PPSMC_Result_OK 0x1 macro
A Dsmu_v13_0_6_ppsmc.h27 #define PPSMC_Result_OK 0x1 macro
A Dsmu_v14_0_2_ppsmc.h30 #define PPSMC_Result_OK 0x1 macro
/drivers/gpu/drm/amd/pm/powerplay/inc/
A Drv_ppsmc.h29 #define PPSMC_Result_OK 0x1 macro
A Dvega12_ppsmc.h32 #define PPSMC_Result_OK 0x1 macro
A Dvega20_ppsmc.h30 #define PPSMC_Result_OK 0x1 macro

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