Searched refs:PRIV_STATE (Results 1 – 12 of 12) sorted by relevance
| /drivers/gpu/drm/amd/amdkfd/ |
| A D | cik_regs.h | 64 #define PRIV_STATE (1 << 30) macro
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| A D | kfd_mqd_manager_cik.c | 344 PRIV_STATE | in update_mqd_hiq()
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| /drivers/gpu/drm/radeon/ |
| A D | cikd.h | 1528 #define PRIV_STATE (1 << 30) macro
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| A D | cik.c | 4672 PRIV_STATE | KMD_QUEUE; /* assuming kernel queue control */ in cik_cp_compute_resume()
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| /drivers/gpu/drm/amd/amdgpu/ |
| A D | mes_v11_0.c | 1138 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1); in mes_v11_0_mqd_init()
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| A D | mes_v12_0.c | 1220 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1); in mes_v12_0_mqd_init()
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| A D | gfx_v12_0.c | 2983 tmp = REG_SET_FIELD(tmp, CP_GFX_MQD_CONTROL, PRIV_STATE, 1); in gfx_v12_0_gfx_mqd_init()
3178 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1); in gfx_v12_0_compute_mqd_init()
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| A D | gfx_v11_0.c | 4089 tmp = REG_SET_FIELD(tmp, CP_GFX_MQD_CONTROL, PRIV_STATE, 1); in gfx_v11_0_gfx_mqd_init()
4284 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1); in gfx_v11_0_compute_mqd_init()
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| A D | gfx_v9_4_3.c | 1910 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1); in gfx_v9_4_3_xcc_mqd_init()
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| A D | gfx_v10_0.c | 6781 tmp = REG_SET_FIELD(tmp, CP_GFX_MQD_CONTROL, PRIV_STATE, 1); in gfx_v10_0_gfx_mqd_init()
6983 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1); in gfx_v10_0_compute_mqd_init()
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| A D | gfx_v8_0.c | 4457 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1); in gfx_v8_0_mqd_init()
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| A D | gfx_v9_0.c | 3631 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1); in gfx_v9_0_mqd_init()
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Completed in 102 milliseconds