| /drivers/tty/serial/ |
| A D | pmac_zilog.c | 162 write_zsreg(uap, R0, RES_EXT_INT); in pmz_load_zsregs()
163 write_zsreg(uap, R0, RES_EXT_INT); in pmz_load_zsregs()
229 write_zsreg(uap, R0, ERR_RES); in pmz_receive_chars()
293 ch = read_zsreg(uap, R0); in pmz_receive_chars()
305 status = read_zsreg(uap, R0); in pmz_status_handle()
407 write_zsreg(uap, R0, RES_Tx_P); in pmz_transmit_chars()
487 status = read_zsreg(uap, R0); in pmz_peek_status()
559 status = read_zsreg(uap, R0); in pmz_get_mctrl()
594 status = read_zsreg(uap, R0); in pmz_start_tx()
817 write_zsreg(uap, R0, ERR_RES); in __pmz_startup()
[all …]
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| A D | zs.c | 324 status_a = read_zsreg(zport_a, R0); in zs_raw_get_ab_mctrl()
325 status_b = read_zsreg(zport_b, R0); in zs_raw_get_ab_mctrl()
421 write_zsreg(zport, R0, RES_Tx_P); in zs_raw_stop_tx()
498 write_zsreg(zport_a, R0, RES_EXT_INT); in zs_enable_ms()
573 write_zsreg(zport, R0, ERR_RES); in zs_receive_chars()
657 status = read_zsreg(zport, R0); in zs_status_handle()
694 write_zsreg(zport, R0, RES_EXT_INT); in zs_status_handle()
779 write_zsreg(zport, R0, ERR_RES); in zs_startup()
780 write_zsreg(zport, R0, RES_Tx_P); in zs_startup()
783 write_zsreg(zport, R0, RES_EXT_INT); in zs_startup()
[all …]
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| A D | zs.h | 60 #define R0 0 /* Register selects */ macro
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| A D | ip22zilog.h | 39 #define R0 0 /* Register selects */ macro
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| A D | sunzilog.h | 31 #define R0 0 /* Register selects */ macro
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| A D | pmac_zilog.h | 117 #define R0 0 /* Register selects */ macro
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| A D | ip22zilog.c | 216 write_zsreg(channel, R0, RES_EXT_INT); in __load_zsregs()
217 write_zsreg(channel, R0, RES_EXT_INT); in __load_zsregs()
701 (void) read_zsreg(channel, R0); in __ip22zilog_reset()
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| A D | sunzilog.c | 249 write_zsreg(channel, R0, RES_EXT_INT); /* First Latch */ in __load_zsregs()
250 write_zsreg(channel, R0, RES_EXT_INT); /* Second Latch */ in __load_zsregs()
1339 (void) read_zsreg(channel, R0); in sunzilog_init_hw()
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| /drivers/media/i2c/ |
| A D | wm8739.c | 35 R0 = 0, R1, enumerator
114 wm8739_write(sd, R0, (vol_l & 0x1f) | mute); in wm8739_s_ctrl()
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| /drivers/regulator/ |
| A D | slg51000-regulator.c | 350 enum { R0 = 0, R1, R2, REG_MAX }; in slg51000_irq_handler() enumerator
388 (evt[i][R0] & SLG51000_EVT_ILIM_FLAG_MASK)) { in slg51000_irq_handler()
400 (evt[SLG51000_SCTL_EVT][R0] & SLG51000_EVT_HIGH_TEMP_WARN_MASK)) { in slg51000_irq_handler()
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| /drivers/net/hamradio/ |
| A D | scc.c | 402 OutReg(scc->ctrl, R0, RES_Tx_CRC); in scc_txint()
439 status = InReg(scc->ctrl,R0); in scc_exint()
655 OutReg(scc->ctrl,R0,RES_H_IUS); /* Reset Highest IUS */ in scc_isr()
704 OutReg(scc->ctrl,R0,RES_H_IUS); in scc_isr()
866 if(scc->kiss.softdcd || (InReg(scc->ctrl,R0) & DCD)) in init_channel()
881 scc->status = InReg(scc->ctrl,R0); /* read initial status */ in init_channel()
1255 OutReg(scc->ctrl, R0, RES_Tx_P); in t_maxkeyup()
2070 seq_printf(seq, "\tR %2.2x %2.2x XX ", InReg(scc->ctrl,R0), InReg(scc->ctrl,R1)); in scc_net_seq_show()
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| A D | z8530.h | 7 #define R0 0 /* Register selects */ macro
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| /drivers/media/dvb-frontends/ |
| A D | drxk_hard.c | 162 u32 R0 = 0; in Frac28a() local
164 R0 = (a % c) << 4; /* 32-28 == 4 shifts possible at max */ in Frac28a()
172 Q1 = (Q1 << 4) | (R0 / c); in Frac28a()
173 R0 = (R0 % c) << 4; in Frac28a()
176 if ((R0 >> 3) >= c) in Frac28a()
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| /drivers/media/dvb-frontends/drx39xyj/ |
| A D | drxj.c | 1065 u32 R0 = 0; in frac28() local
1067 R0 = (N % D) << 4; /* 32-28 == 4 shifts possible at max */ in frac28()
1073 Q1 = (Q1 << 4) | R0 / D; in frac28()
1074 R0 = (R0 % D) << 4; in frac28()
1077 if ((R0 >> 3) >= D) in frac28()
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