Searched refs:R14 (Results 1 – 16 of 16) sorted by relevance
19 # R13: 0000000000000003 R14: 0000000000000004 R15: 000000000000000053 # R13: 0000000000000003 R14: 0000000000000004 R15: 000000000000000070 # R13: 0000000000000000 R14: 0000000000000001 R15: 0000000000000000104 # R13: 0000000000000000 R14: 0000000000000001 R15: 0000000000000000121 # R13: 0000000000000002 R14: 0000000000000002 R15: 0000000000000000155 # R13: 0000000000000002 R14: 0000000000000002 R15: 0000000000000000172 # R13: 0000000000000031 R14: 0000000000000031 R15: 0000000000000000208 # R13: 0000000000000031 R14: 0000000000000031 R15: 000000000000223 # R13: 0000000000000000 R14: 0000000000000000 R15: 0000000000000000257 # R13: 0000000000000000 R14: 0000000000000000 R15: 0000000000000000[all …]
60 # R13: 0000000000000000 R14: ffff953182570d68 R15: 000000000000000091 # R13: 0000000000000003 R14: 000055b3526a7220 R15: 00007f749a0dc020113 # R13: ffff953182573208 R14: ffff953182570d68 R15: 0000000000000000145 # R13: 0000000000000003 R14: 000055b3526a7220 R15: 00007f749a0dc020
48 # R13: 0000000000000000 R14: ffff93498093c9b0 R15: 000000000000000071 # R13: 0000000000000003 R14: 00000000c05064a7 R15: 00007ffe061f6d00175 # R13: 0000000000000003 R14: 0000000000000000 R15: 000055f26040ab90195 # R13: 0000000000000000 R14: ffff98858093c9b0 R15: 0000000000000000218 # R13: 0000000000000003 R14: 00000000c05064a7 R15: 00007ffc42b13710323 # R13: 0000000000000003 R14: 0000000000000000 R15: 000055eea27378d0
36 R12, R13, R14, R15, R16, R17, R18, R19, R20, R21, R23 = 23, enumerator97 wm8775_write(sd, R14, vol_l | 0x100); /* 0x100= Left channel ADC zero cross enable */ in wm8775_set_audio()250 wm8775_write(sd, R14, 0x1d4); in wm8775_probe()
32 R10, R11, R12, R13, R14, enumerator
361 OutReg(scc->ctrl,R14,SEARCH|scc->wreg[R14]); /* DPLL: enter search mode */ in start_hunt()457 OutReg(scc->ctrl,R14,SEARCH|scc->wreg[R14]); /* DPLL: enter search mode */ in scc_exint()723 cl(scc,R14,BRENABL); /* disable baudrate generator */ in set_brg()726 or(scc,R14,BRENABL); /* enable baudrate generator */ in set_brg()745 wr(scc, R14, BRSRC); /* BRG source = PCLK */ in init_brg()746 OutReg(scc->ctrl, R14, SSBR|scc->wreg[R14]); /* DPLL source = BRG */ in init_brg()747 OutReg(scc->ctrl, R14, SNRZI|scc->wreg[R14]); /* DPLL NRZI mode */ in init_brg()810 wr(scc,R14, 0); in init_channel()853 OutReg(scc->ctrl, R14, DISDPLL); in init_channel()
21 #define R14 14 macro
149 write_zsreg(uap, R14, regs[R14] & ~BRENAB); in pmz_load_zsregs()159 write_zsreg(uap, R14, regs[R14]); in pmz_load_zsregs()830 uap->curregs[R14] = BRENAB; in __pmz_startup()967 uap->curregs[R14] = 0; /* BRG off */ in pmz_convert_to_zs()976 uap->curregs[R14] = 0; in pmz_convert_to_zs()981 uap->curregs[R14] = 0; in pmz_convert_to_zs()989 uap->curregs[R14] = BRENAB; in pmz_convert_to_zs()
200 write_zsreg(channel, R14, regs[R14] & ~BRENAB); in __load_zsregs()210 write_zsreg(channel, R14, regs[R14]); in __load_zsregs()808 up->curregs[R14] = BRENAB; in ip22zilog_convert_to_zs()1146 up->curregs[R14] = BRENAB; in ip22zilog_prepare()
219 write_zsreg(channel, R14, regs[R14] & ~BRENAB); in __load_zsregs()229 write_zsreg(channel, R14, regs[R14]); in __load_zsregs()874 up->curregs[R14] = BRSRC | BRENAB; in sunzilog_convert_to_zs()1373 up->curregs[R14] = BRSRC | BRENAB; in sunzilog_init_hw()
74 #define R14 14 macro
53 #define R14 14 macro
45 #define R14 14 macro
131 #define R14 14 macro
276 write_zsreg(zport, R14, regs[14] & ~BRENABL); in load_zsregs()280 write_zsreg(zport, R14, regs[14]); in load_zsregs()414 write_zsreg(zport, R14, zport->regs[14]); in zs_set_mctrl()
46 #define R14 14 macro
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