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Searched refs:R9 (Results 1 – 12 of 12) sorted by relevance

/drivers/media/i2c/
A Dwm8739.c36 R5 = 5, R6, R7, R8, R9, R15 = 15, enumerator
127 wm8739_write(sd, R9, 0x000); in wm8739_s_clock_freq()
145 wm8739_write(sd, R9, 0x001); in wm8739_s_clock_freq()
230 wm8739_write(sd, R9, 0x001); in wm8739_probe()
/drivers/tty/serial/
A Dsunzilog.c1337 write_zsreg(channel, R9, FHWRES); in sunzilog_init_hw()
1350 up->curregs[R9] = NV; in sunzilog_init_hw()
1355 up->curregs[R9] |= MIE; in sunzilog_init_hw()
1356 write_zsreg(channel, R9, up->curregs[R9]); in sunzilog_init_hw()
1366 up->curregs[R9] = NV; in sunzilog_init_hw()
1381 up->curregs[R9] |= MIE; in sunzilog_init_hw()
1382 write_zsreg(channel, R9, up->curregs[R9]); in sunzilog_init_hw()
1588 up->curregs[R9] |= MIE; in sunzilog_init()
1589 write_zsreg(channel, R9, up->curregs[R9]); in sunzilog_init()
1625 up->curregs[R9] &= ~MIE; in sunzilog_exit()
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A Dzs.h69 #define R9 9 macro
A Dip22zilog.h48 #define R9 9 macro
A Dsunzilog.h40 #define R9 9 macro
A Dip22zilog.c699 write_zsreg(channel, R9, FHWRES); in __ip22zilog_reset()
717 write_zsreg(channel, R9, up->curregs[R9]); in __ip22zilog_startup()
1140 up->curregs[R9] = NV | MIE; in ip22zilog_prepare()
A Dpmac_zilog.h126 #define R9 9 macro
A Dpmac_zilog.c173 write_zsreg(uap, R9, regs[R9]); in pmz_load_zsregs()
808 uap->curregs[R9] = 0; in __pmz_startup()
836 uap->curregs[R9] |= NV | MIE; in __pmz_startup()
A Dzs.c272 write_zsreg(zport, R9, regs[9]); in load_zsregs()
840 write_zsreg(zport, R9, FHWRES); in zs_reset()
842 write_zsreg(zport, R9, 0); in zs_reset()
/drivers/net/hamradio/
A Dz8530.h16 #define R9 9 macro
A Dscc.c808 wr(scc,R9,VIS); /* vector includes status */ in init_channel()
883 or(scc,R9,MIE); /* master interrupt enable */ in init_channel()
1502 OutReg(scc->ctrl,R9,FHWRES); /* force hardware reset */ in z8530_init()
1505 wr(scc, R9, VIS); /* vector includes status */ in z8530_init()
1768 OutReg(hwcfg.ctrl_a, R9, FHWRES); in scc_net_siocdevprivate()
2140 OutReg(ctrl,R9,FHWRES); /* force hardware reset */ in scc_cleanup_driver()
/drivers/memory/
A Djedec_ddr.h41 #define R9 9 macro

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