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Searched refs:RCR (Results 1 – 16 of 16) sorted by relevance

/drivers/net/ethernet/smsc/
A Dsmc9194.h80 #define RCR 4 macro
207 #define SMC_DELAY() { inw( ioaddr + RCR );\
208 inw( ioaddr + RCR );\
209 inw( ioaddr + RCR ); }
A Dsmc9194.c324 outw( RCR_SOFTRESET, ioaddr + RCR ); in smc_reset()
331 outw( RCR_CLEAR, ioaddr + RCR ); in smc_reset()
364 outw( RCR_NORMAL, ioaddr + RCR ); in smc_enable()
393 outb( RCR_CLEAR, ioaddr + RCR ); in smc_shutdown()
1458 outw( inw(ioaddr + RCR ) | RCR_PROMISC, ioaddr + RCR ); in smc_set_multicast_list()
1470 outw( inw(ioaddr + RCR ) | RCR_ALMUL, ioaddr + RCR ); in smc_set_multicast_list()
1479 outw( inw( ioaddr + RCR ) & ~(RCR_PROMISC | RCR_ALMUL), in smc_set_multicast_list()
1480 ioaddr + RCR ); in smc_set_multicast_list()
1486 outw( inw( ioaddr + RCR ) & ~(RCR_PROMISC | RCR_ALMUL), in smc_set_multicast_list()
1487 ioaddr + RCR ); in smc_set_multicast_list()
A Dsmc91c92_cs.c225 #define RCR 4 macro
1100 mask_bits(0xff00, ioaddr + RCR); in smc_close()
1579 outw(rx_cfg_setting, ioaddr + RCR); in set_rx_mode()
1651 outw(RCR_SOFTRESET, ioaddr + RCR); in smc_reset()
1655 outw(RCR_CLEAR, ioaddr + RCR); in smc_reset()
/drivers/rtc/
A Drtc-r9701.c38 #define RCR 0x0f /* RTC Control Register */ macro
/drivers/tty/
A Dsynclink_gt.c367 #define RCR 0x86 /* rx control */ macro
2634 wr_reg16(info, RCR, rd_reg16(info, RCR) | BIT3); in rx_enable()
3852 val = rd_reg16(info, RCR) & ~BIT1; /* clear enable bit */ in rx_stop()
3853 wr_reg16(info, RCR, (unsigned short)(val | BIT2)); /* set reset bit */ in rx_stop()
3854 wr_reg16(info, RCR, val); /* clear reset bit */ in rx_stop()
3877 val = rd_reg16(info, RCR) & ~BIT1; /* clear enable bit */ in rx_start()
3879 wr_reg16(info, RCR, val); /* clear reset bit */ in rx_start()
3910 wr_reg16(info, RCR, (unsigned short)(rd_reg16(info, RCR) | BIT1)); in rx_start()
4087 wr_reg16(info, RCR, val); in async_mode()
4275 wr_reg16(info, RCR, val); in sync_mode()
[all …]
/drivers/net/wireless/realtek/rtlwifi/rtl8192se/
A Dfw.c289 tmpu4b = rtl_read_dword(rtlpriv, RCR); in _rtl92s_firmware_checkready()
290 rtl_write_dword(rtlpriv, RCR, (tmpu4b | RCR_APPFCS | in _rtl92s_firmware_checkready()
A Dhw.c285 rtl_write_dword(rtlpriv, RCR, ((u32 *) (val))[0]); in rtl92se_set_hw_reg()
765 rtl_write_dword(rtlpriv, RCR, rtlpci->receive_config); in _rtl92se_macconfig_after_fwdownload()
988 rtlpci->receive_config = rtl_read_dword(rtlpriv, RCR); in rtl92se_hw_init()
990 rtl_write_dword(rtlpriv, RCR, rtlpci->receive_config); in rtl92se_hw_init()
A Dreg.h37 #define RCR 0x0048 macro
/drivers/net/usb/
A Drtl8150.c25 #define RCR 0x0130 macro
637 set_registers(dev, RCR, 1, &rcr); in enable_net_traffic()
680 async_set_registers(dev, RCR, sizeof(rx_creg), rx_creg); in rtl8150_set_multicast()
/drivers/net/ethernet/microchip/
A Dencx24j600_hw.h66 #define RCR(addr) (RCRCODE | (addr & ADDR_MASK)) /* Read Control Register */ macro
/drivers/net/wan/
A Dhd64572.h105 #define RCR 0x156 /* Rx DMA Critical Request Reg */ macro
/drivers/spi/
A Dspi-atmel.c943 spi_writel(as, RCR, len); in atmel_spi_pdc_next_xfer()
1427 spi_readl(as, TCR), spi_readl(as, RCR)); in atmel_spi_one_transfer()
1435 spi_writel(as, RCR, 0); in atmel_spi_one_transfer()
/drivers/net/ethernet/renesas/
A Dravb.h78 RCR = 0x0090, enumerator
A Dravb_main.c621 ravb_write(ndev, 0x60000000, RCR); in ravb_dmac_init_gbeth()
664 RCR_EFFS | RCR_ENCF | RCR_ETS0 | RCR_ESF | 0x18000000, RCR); in ravb_dmac_init_rcar()
/drivers/net/ethernet/via/
A Dvia-velocity.h969 volatile u8 RCR; member
A Dvia-velocity.c1170 BYTE_REG_BITS_ON(rx_mode, &regs->RCR); in velocity_set_multi()

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